/* Waiting for clock source ready */
CLK_WaitClockReady(CLK_CLKSTATUS_OSC10K_STB_Msk|CLK_CLKSTATUS_OSC22M_STB_Msk|CLK_CLKSTATUS_XTL12M_STB_Msk);
/* Disable PLL first to avoid unstable when setting PLL */
CLK_DisablePLL();
/* Set PLL frequency */
CLK->PLLCON = (CLK->PLLCON & ~(0x000FFFFFul)) | 0x00004016ul;
/* Waiting for PLL ready */
CLK_WaitClockReady(CLK_CLKSTATUS_PLL_STB_Msk);
/* If the defines do not exist in your project, please refer to the related clk.h in the Header folder appended to the tool package. */
/* Set HCLK clock */
CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_PLL, CLK_CLKDIV_HCLK(1));