; generated by Component: ARM Compiler 5.05 (build 41) Tool: ArmCC [4d0eb9]
; commandline ArmCC [--list --debug -c --asm --interleave -o.\obj\main.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\main.d --cpu=Cortex-M0 --apcs=interwork -I..\..\..\Library\CMSIS\Include -I..\..\..\Library\Device\Nuvoton\Mini51Series\Include -I..\..\..\Library\StdDriver\inc -I.\StdDriver\inc -I.\CMSIS -IG:\Geek\Projects\Zulolo_F\Force\Code\Zulolo_F_Force\RTE -ID:\Keil_v5\ARM\PACK\Nuvoton\NuMicro_DFP\1.0.2\Device\Mini51\Include -ID:\Keil_v5\ARM\CMSIS\Include -I\ -D__MICROLIB --omf_browse=.\obj\main.crf User\main.c]
                          THUMB

                          AREA ||.text||, CODE, READONLY, ALIGN=2

                  NVIC_SetPriority PROC
;;;570     */
;;;571    __STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
000000  0783              LSLS     r3,r0,#30
;;;572    {
;;;573      if(IRQn < 0) {
;;;574        SCB->SHP[_SHP_IDX(IRQn)] = (SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
000002  22ff              MOVS     r2,#0xff
000004  0edb              LSRS     r3,r3,#27
000006  409a              LSLS     r2,r2,r3
000008  0789              LSLS     r1,r1,#30
00000a  0e09              LSRS     r1,r1,#24
00000c  4099              LSLS     r1,r1,r3
00000e  2800              CMP      r0,#0                 ;573
000010  da0b              BGE      |L1.42|
000012  0700              LSLS     r0,r0,#28
000014  0f00              LSRS     r0,r0,#28
000016  3808              SUBS     r0,r0,#8
000018  0883              LSRS     r3,r0,#2
00001a  48ff              LDR      r0,|L1.1048|
00001c  009b              LSLS     r3,r3,#2
00001e  1818              ADDS     r0,r3,r0
000020  69c3              LDR      r3,[r0,#0x1c]
000022  4393              BICS     r3,r3,r2
000024  430b              ORRS     r3,r3,r1
000026  61c3              STR      r3,[r0,#0x1c]
;;;575            (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
;;;576      else {
;;;577        NVIC->IP[_IP_IDX(IRQn)] = (NVIC->IP[_IP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
;;;578            (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
;;;579    }
000028  4770              BX       lr
                  |L1.42|
00002a  0883              LSRS     r3,r0,#2              ;577
00002c  48fb              LDR      r0,|L1.1052|
00002e  009b              LSLS     r3,r3,#2              ;577
000030  1818              ADDS     r0,r3,r0              ;577
000032  6803              LDR      r3,[r0,#0]            ;577
000034  4393              BICS     r3,r3,r2              ;577
000036  430b              ORRS     r3,r3,r1              ;577
000038  6003              STR      r3,[r0,#0]            ;577
00003a  4770              BX       lr
;;;580    
                          ENDP

                  CLK_Init PROC
;;;15     
;;;16     void CLK_Init()
00003c  b5f8              PUSH     {r3-r7,lr}
;;;17     {
;;;18         /* Enable internal 22.1184MHz */
;;;19         CLK->PWRCON |= CLK_PWRCON_IRC22M_EN_Msk;
00003e  48f8              LDR      r0,|L1.1056|
000040  6801              LDR      r1,[r0,#0]
000042  2204              MOVS     r2,#4
000044  4311              ORRS     r1,r1,r2
000046  6001              STR      r1,[r0,#0]
;;;20     
;;;21         /* Waiting for clock ready */
;;;22         CLK_WaitClockReady(CLK_CLKSTATUS_IRC22M_STB_Msk);
000048  2010              MOVS     r0,#0x10
00004a  f7fffffe          BL       CLK_WaitClockReady
;;;23     
;;;24         // Configure HCLK to use 22.1184MHz HIRC and div by 1
;;;25         CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_IRC22M, CLK_CLKDIV_HCLK(1));
00004e  2100              MOVS     r1,#0
000050  2007              MOVS     r0,#7
000052  f7fffffe          BL       CLK_SetHCLK
;;;26     //	CLK_DisableXtalRC(CLK_PWRCON_XTLCLK_EN_Msk);
;;;27     
;;;28         // Configure SysTick to use HIRC
;;;29     //	SetSysTickClockSrc(CLK_CLKSEL0_STCLK_S_IRC22M_DIV2);
;;;30     
;;;31     //    CLK_SetSysTickClockSrc(CLK_CLKSEL0_STCLK_S_HCLK_DIV2);
;;;32         CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDT_S_HCLK_DIV2048, WHAT_EVER_DO_NOT_CARE);
000056  4cf3              LDR      r4,|L1.1060|
000058  2201              MOVS     r2,#1
00005a  2102              MOVS     r1,#2
00005c  4620              MOV      r0,r4
00005e  f7fffffe          BL       CLK_SetModuleClock
;;;33         CLK_SetModuleClock(ADC_MODULE, CLK_CLKSEL1_ADC_S_IRC22M, CLK_CLKDIV_ADC(ADC_CLK_DIVIDER));
000062  4df1              LDR      r5,|L1.1064|
000064  2237              MOVS     r2,#0x37
000066  0492              LSLS     r2,r2,#18
000068  210c              MOVS     r1,#0xc
00006a  4628              MOV      r0,r5
00006c  f7fffffe          BL       CLK_SetModuleClock
;;;34         CLK_SetModuleClock(PWM01_MODULE, CLK_CLKSEL1_PWM01_S_HCLK, WHAT_EVER_DO_NOT_CARE);
000070  4eee              LDR      r6,|L1.1068|
000072  2201              MOVS     r2,#1
000074  0751              LSLS     r1,r2,#29
000076  4630              MOV      r0,r6
000078  f7fffffe          BL       CLK_SetModuleClock
;;;35         CLK_SetModuleClock(PWM23_MODULE, CLK_CLKSEL1_PWM23_S_HCLK, WHAT_EVER_DO_NOT_CARE);
00007c  4fec              LDR      r7,|L1.1072|
00007e  2201              MOVS     r2,#1
000080  07d1              LSLS     r1,r2,#31
000082  4638              MOV      r0,r7
000084  f7fffffe          BL       CLK_SetModuleClock
;;;36         CLK_SetModuleClock(PWM45_MODULE, CLK_CLKSEL2_PWM45_S_HCLK, WHAT_EVER_DO_NOT_CARE);
000088  2201              MOVS     r2,#1
00008a  2120              MOVS     r1,#0x20
00008c  48e9              LDR      r0,|L1.1076|
00008e  f7fffffe          BL       CLK_SetModuleClock
;;;37         CLK_SetModuleClock(UART_MODULE, CLK_CLKSEL1_UART_S_IRC22M, CLK_CLKDIV_UART(UART_CLK_DIVIDER));
000092  2101              MOVS     r1,#1
000094  2200              MOVS     r2,#0
000096  0649              LSLS     r1,r1,#25
000098  48e7              LDR      r0,|L1.1080|
00009a  f7fffffe          BL       CLK_SetModuleClock
;;;38         CLK_SetModuleClock(TMR0_MODULE, CLK_CLKSEL1_TMR0_S_HCLK , WHAT_EVER_DO_NOT_CARE);
00009e  2201              MOVS     r2,#1
0000a0  0251              LSLS     r1,r2,#9
0000a2  48e6              LDR      r0,|L1.1084|
0000a4  f7fffffe          BL       CLK_SetModuleClock
;;;39         CLK_SetModuleClock(TMR1_MODULE, CLK_CLKSEL1_TMR1_S_HCLK , WHAT_EVER_DO_NOT_CARE);
0000a8  2201              MOVS     r2,#1
0000aa  0351              LSLS     r1,r2,#13
0000ac  48e4              LDR      r0,|L1.1088|
0000ae  f7fffffe          BL       CLK_SetModuleClock
;;;40         CLK_SetModuleClock(SPI_MODULE, CLK_CLKSEL1_SPI_S_HCLK  , WHAT_EVER_DO_NOT_CARE);
0000b2  2201              MOVS     r2,#1
0000b4  4611              MOV      r1,r2
0000b6  48e3              LDR      r0,|L1.1092|
0000b8  f7fffffe          BL       CLK_SetModuleClock
;;;41     
;;;42         // Nai nai de seems can not use | | | to put all peripheral enable into one invoke
;;;43         CLK_EnableModuleClock(WDT_MODULE);
0000bc  4620              MOV      r0,r4
0000be  f7fffffe          BL       CLK_EnableModuleClock
;;;44         CLK_EnableModuleClock(TMR0_MODULE);
0000c2  48de              LDR      r0,|L1.1084|
0000c4  f7fffffe          BL       CLK_EnableModuleClock
;;;45         CLK_EnableModuleClock(TMR1_MODULE);
0000c8  48dd              LDR      r0,|L1.1088|
0000ca  f7fffffe          BL       CLK_EnableModuleClock
;;;46         CLK_EnableModuleClock(SPI_MODULE);
0000ce  48dd              LDR      r0,|L1.1092|
0000d0  f7fffffe          BL       CLK_EnableModuleClock
;;;47         CLK_EnableModuleClock(UART_MODULE);
0000d4  48d8              LDR      r0,|L1.1080|
0000d6  f7fffffe          BL       CLK_EnableModuleClock
;;;48         CLK_EnableModuleClock(PWM01_MODULE);
0000da  4630              MOV      r0,r6
0000dc  f7fffffe          BL       CLK_EnableModuleClock
;;;49         CLK_EnableModuleClock(PWM23_MODULE);
0000e0  4638              MOV      r0,r7
0000e2  f7fffffe          BL       CLK_EnableModuleClock
;;;50         CLK_EnableModuleClock(PWM45_MODULE);
0000e6  48d3              LDR      r0,|L1.1076|
0000e8  f7fffffe          BL       CLK_EnableModuleClock
;;;51         CLK_EnableModuleClock(ADC_MODULE);
0000ec  4628              MOV      r0,r5
0000ee  f7fffffe          BL       CLK_EnableModuleClock
;;;52         CLK_EnableModuleClock(ACMP_MODULE);
0000f2  48d5              LDR      r0,|L1.1096|
0000f4  f7fffffe          BL       CLK_EnableModuleClock
;;;53     }
0000f8  bdf8              POP      {r3-r7,pc}
;;;54     
                          ENDP

                  IRQ_Init PROC
;;;55     void IRQ_Init()
0000fa  b510              PUSH     {r4,lr}
;;;56     {
;;;57         NVIC_EnableIRQ(TMR0_IRQn);
0000fc  2008              MOVS     r0,#8
0000fe  f7fffffe          BL       NVIC_EnableIRQ
;;;58         NVIC_EnableIRQ(TMR1_IRQn);
000102  2009              MOVS     r0,#9
000104  f7fffffe          BL       NVIC_EnableIRQ
;;;59         NVIC_EnableIRQ(SPI_IRQn);
000108  200e              MOVS     r0,#0xe
00010a  f7fffffe          BL       NVIC_EnableIRQ
;;;60         NVIC_EnableIRQ(ACMP_IRQn);
00010e  2019              MOVS     r0,#0x19
000110  f7fffffe          BL       NVIC_EnableIRQ
;;;61         NVIC_EnableIRQ(EINT0_IRQn);
000114  2002              MOVS     r0,#2
000116  f7fffffe          BL       NVIC_EnableIRQ
;;;62         NVIC_EnableIRQ(ADC_IRQn);
00011a  201d              MOVS     r0,#0x1d
00011c  f7fffffe          BL       NVIC_EnableIRQ
;;;63     //    NVIC_EnableIRQ(PWM_IRQn);
;;;64     
;;;65         NVIC_SetPriority(TMR0_IRQn, 1);
000120  2101              MOVS     r1,#1
000122  2008              MOVS     r0,#8
000124  f7fffffe          BL       NVIC_SetPriority
;;;66         NVIC_SetPriority(TMR1_IRQn, 1);
000128  2101              MOVS     r1,#1
00012a  2009              MOVS     r0,#9
00012c  f7fffffe          BL       NVIC_SetPriority
;;;67         NVIC_SetPriority(SPI_IRQn, 3);
000130  2103              MOVS     r1,#3
000132  200e              MOVS     r0,#0xe
000134  f7fffffe          BL       NVIC_SetPriority
;;;68         NVIC_SetPriority(ACMP_IRQn, 2);
000138  2102              MOVS     r1,#2
00013a  2019              MOVS     r0,#0x19
00013c  f7fffffe          BL       NVIC_SetPriority
;;;69         NVIC_SetPriority(EINT0_IRQn, 0);
000140  2100              MOVS     r1,#0
000142  2002              MOVS     r0,#2
000144  f7fffffe          BL       NVIC_SetPriority
;;;70         NVIC_SetPriority(ADC_IRQn, 3);
000148  2103              MOVS     r1,#3
00014a  201d              MOVS     r0,#0x1d
00014c  f7fffffe          BL       NVIC_SetPriority
;;;71     //    NVIC_SetPriority(PWM_IRQn, 2);
;;;72     
;;;73         GPIO_EnableEINT0(BRG_FAULT_PORT, BRG_FAULT_PIN, GPIO_INT_FALLING);
000150  2201              MOVS     r2,#1
000152  2104              MOVS     r1,#4
000154  48bd              LDR      r0,|L1.1100|
000156  f7fffffe          BL       GPIO_EnableInt
;;;74     }
00015a  bd10              POP      {r4,pc}
;;;75     
                          ENDP

                  GPIO_Init PROC
;;;76     void GPIO_Init()
00015c  b5f8              PUSH     {r3-r7,lr}
;;;77     {
;;;78     /*---------------------------------------------------------------------------------------------------------*/
;;;79     /* GPIO configuration                                                                                 	   */
;;;80     /*---------------------------------------------------------------------------------------------------------*/
;;;81         // LED Pin
;;;82         GPIO_SetMode(LED_PORT, LED_PIN, GPIO_PMD_OUTPUT);
00015e  4cbb              LDR      r4,|L1.1100|
000160  2201              MOVS     r2,#1
000162  3480              ADDS     r4,r4,#0x80
000164  2110              MOVS     r1,#0x10
000166  4620              MOV      r0,r4
000168  f7fffffe          BL       GPIO_SetMode
;;;83     
;;;84         // Bridge Enable Pin
;;;85         GPIO_SetMode(BRG_EN_PORT, BRG_EN_PIN, GPIO_PMD_OUTPUT);
00016c  4db7              LDR      r5,|L1.1100|
00016e  2201              MOVS     r2,#1
000170  4611              MOV      r1,r2
000172  4628              MOV      r0,r5
000174  f7fffffe          BL       GPIO_SetMode
;;;86         BRG_DISABLE;
000178  48b5              LDR      r0,|L1.1104|
00017a  2700              MOVS     r7,#0
00017c  6207              STR      r7,[r0,#0x20]
;;;87     
;;;88         // Bridge Fault Pin
;;;89         GPIO_SetMode(BRG_FAULT_PORT, BRG_FAULT_PIN, GPIO_PMD_INPUT);
00017e  463a              MOV      r2,r7
000180  2104              MOVS     r1,#4
000182  4628              MOV      r0,r5
000184  f7fffffe          BL       GPIO_SetMode
;;;90     
;;;91         // PWM Pin
;;;92         GPIO_SetMode(MOSFET_DRV_0_4_PORT, MOSFET_DRV_0_PIN | MOSFET_DRV_1_PIN | MOSFET_DRV_2_PIN | 
000188  48b0              LDR      r0,|L1.1100|
00018a  2201              MOVS     r2,#1
00018c  217c              MOVS     r1,#0x7c
00018e  3840              SUBS     r0,r0,#0x40
000190  f7fffffe          BL       GPIO_SetMode
;;;93     			     MOSFET_DRV_3_PIN | MOSFET_DRV_4_PIN, GPIO_PMD_OUTPUT);
;;;94         GPIO_SetMode(MOSFET_DRV_5_PORT, MOSFET_DRV_5_PIN, GPIO_PMD_OUTPUT);
000194  4ead              LDR      r6,|L1.1100|
000196  2201              MOVS     r2,#1
000198  3ec0              SUBS     r6,r6,#0xc0
00019a  2110              MOVS     r1,#0x10
00019c  4630              MOV      r0,r6
00019e  f7fffffe          BL       GPIO_SetMode
;;;95     
;;;96         // SPI, I am slave
;;;97         GPIO_SetMode(COMM_PORT, COMM_CLK_PIN | COMM_CS_PIN | COMM_RX_PIN, GPIO_PMD_INPUT);
0001a2  2200              MOVS     r2,#0
0001a4  21a2              MOVS     r1,#0xa2
0001a6  4630              MOV      r0,r6
0001a8  f7fffffe          BL       GPIO_SetMode
;;;98         GPIO_SetMode(COMM_PORT, COMM_TX_PIN, GPIO_PMD_OUTPUT);
0001ac  2201              MOVS     r2,#1
0001ae  2140              MOVS     r1,#0x40
0001b0  4630              MOV      r0,r6
0001b2  f7fffffe          BL       GPIO_SetMode
;;;99     
;;;100        // UART Pin
;;;101        GPIO_SetMode(DEBUG_TX_PORT, DEBUG_TX_PIN, GPIO_PMD_OUTPUT);
0001b6  2201              MOVS     r2,#1
0001b8  4611              MOV      r1,r2
0001ba  4630              MOV      r0,r6
0001bc  f7fffffe          BL       GPIO_SetMode
;;;102        GPIO_SetMode(DEBUG_RX_PORT, DEBUG_RX_PIN, GPIO_PMD_INPUT);
0001c0  4ea2              LDR      r6,|L1.1100|
0001c2  2200              MOVS     r2,#0
0001c4  3e80              SUBS     r6,r6,#0x80
0001c6  2104              MOVS     r1,#4
0001c8  4630              MOV      r0,r6
0001ca  f7fffffe          BL       GPIO_SetMode
;;;103    
;;;104        // DEBUG for ACMP Output Pin
;;;105        GPIO_SetMode(DEBUG_ACMP_OUT_PORT, DEBUG_ACMP_OUT_PIN, GPIO_PMD_OUTPUT);
0001ce  2201              MOVS     r2,#1
0001d0  2140              MOVS     r1,#0x40
0001d2  4628              MOV      r0,r5
0001d4  f7fffffe          BL       GPIO_SetMode
;;;106    	GPIO_SetMode(DEBUG_GPIO_PORT, DEBUG_GPIO_PIN, GPIO_PMD_OUTPUT);
0001d8  2201              MOVS     r2,#1
0001da  4611              MOV      r1,r2
0001dc  4620              MOV      r0,r4
0001de  f7fffffe          BL       GPIO_SetMode
;;;107    	P50 = 0;
0001e2  489b              LDR      r0,|L1.1104|
0001e4  3040              ADDS     r0,r0,#0x40
0001e6  6207              STR      r7,[r0,#0x20]
;;;108    
;;;109        // ADC for current Pin
;;;110        GPIO_DISABLE_DIGITAL_PATH(CURRENT_PORT, CURRENT_PIN << GPIO_OFFD_OFF_SET);
0001e8  6860              LDR      r0,[r4,#4]
0001ea  2101              MOVS     r1,#1
0001ec  04c9              LSLS     r1,r1,#19
0001ee  4308              ORRS     r0,r0,r1
0001f0  6060              STR      r0,[r4,#4]
;;;111        GPIO_SetMode(CURRENT_PORT, CURRENT_PIN, GPIO_PMD_INPUT);
0001f2  2200              MOVS     r2,#0
0001f4  2108              MOVS     r1,#8
0001f6  4620              MOV      r0,r4
0001f8  f7fffffe          BL       GPIO_SetMode
;;;112        // ADC for battery Pin
;;;113        GPIO_DISABLE_DIGITAL_PATH(BATTERY_V_PORT, BATTERY_V_PIN << GPIO_OFFD_OFF_SET);
0001fc  6868              LDR      r0,[r5,#4]
0001fe  2101              MOVS     r1,#1
000200  0449              LSLS     r1,r1,#17
000202  4308              ORRS     r0,r0,r1
000204  6068              STR      r0,[r5,#4]
;;;114        GPIO_SetMode(BATTERY_V_PORT, BATTERY_V_PIN, GPIO_PMD_INPUT);
000206  2200              MOVS     r2,#0
000208  2102              MOVS     r1,#2
00020a  4628              MOV      r0,r5
00020c  f7fffffe          BL       GPIO_SetMode
;;;115    	    
;;;116        // ACMP Pin
;;;117        GPIO_DISABLE_DIGITAL_PATH(ZERO_DETECT_PORT, (ZERO_DETECT_A_PIN | ZERO_DETECT_B_PIN |
000210  6870              LDR      r0,[r6,#4]
000212  2139              MOVS     r1,#0x39
000214  0409              LSLS     r1,r1,#16
000216  4308              ORRS     r0,r0,r1
000218  6070              STR      r0,[r6,#4]
;;;118    			      ZERO_DETECT_C_PIN | ZERO_DETECT_M_PIN) << GPIO_OFFD_OFF_SET);
;;;119        GPIO_SetMode(ZERO_DETECT_PORT, ZERO_DETECT_A_PIN | ZERO_DETECT_B_PIN |
00021a  2200              MOVS     r2,#0
00021c  2139              MOVS     r1,#0x39
00021e  4630              MOV      r0,r6
000220  f7fffffe          BL       GPIO_SetMode
;;;120    		 ZERO_DETECT_C_PIN | ZERO_DETECT_M_PIN, GPIO_PMD_INPUT);
;;;121    /*---------------------------------------------------------------------------------------------------------*/
;;;122    /* Init I/O Multi-function                                                                                 */
;;;123    /*---------------------------------------------------------------------------------------------------------*/
;;;124        /* Set multi-function pins for UART RXD and TXD */
;;;125        SYS->P0_MFP &= ~SYS_MFP_P00_Msk;
000224  05a0              LSLS     r0,r4,#22
000226  6b01              LDR      r1,[r0,#0x30]
000228  4a8a              LDR      r2,|L1.1108|
00022a  4011              ANDS     r1,r1,r2
00022c  6301              STR      r1,[r0,#0x30]
;;;126        SYS->P0_MFP |= SYS_MFP_P00_TXD;  
00022e  6b01              LDR      r1,[r0,#0x30]
000230  24ff              MOVS     r4,#0xff
000232  3402              ADDS     r4,#2
000234  4321              ORRS     r1,r1,r4
000236  6301              STR      r1,[r0,#0x30]
;;;127        SYS->P1_MFP &= ~SYS_MFP_P12_Msk;
000238  6b41              LDR      r1,[r0,#0x34]
00023a  4b87              LDR      r3,|L1.1112|
00023c  4019              ANDS     r1,r1,r3
00023e  6341              STR      r1,[r0,#0x34]
;;;128        SYS->P1_MFP |= SYS_MFP_P12_RXD; 
000240  6b41              LDR      r1,[r0,#0x34]
000242  2201              MOVS     r2,#1
000244  0292              LSLS     r2,r2,#10
000246  4311              ORRS     r1,r1,r2
000248  6341              STR      r1,[r0,#0x34]
;;;129    	 
;;;130    	/* Set multi-function pins for SPI */
;;;131        SYS->P0_MFP &= ~(SYS_MFP_P01_Msk | SYS_MFP_P05_Msk | SYS_MFP_P06_Msk | SYS_MFP_P07_Msk);
00024a  6b01              LDR      r1,[r0,#0x30]
00024c  4a83              LDR      r2,|L1.1116|
00024e  4011              ANDS     r1,r1,r2
000250  6301              STR      r1,[r0,#0x30]
;;;132        SYS->P0_MFP |= (SYS_MFP_P01_SPISS | SYS_MFP_P05_MOSI | SYS_MFP_P06_MISO | SYS_MFP_P07_SPICLK); 
000252  6b01              LDR      r1,[r0,#0x30]
000254  4a82              LDR      r2,|L1.1120|
000256  4311              ORRS     r1,r1,r2
000258  6301              STR      r1,[r0,#0x30]
;;;133    
;;;134    	/* Set multi-function pins for ADC for current */
;;;135        SYS->P5_MFP &= ~SYS_MFP_P53_Msk;
00025a  4982              LDR      r1,|L1.1124|
00025c  684a              LDR      r2,[r1,#4]
00025e  4d82              LDR      r5,|L1.1128|
000260  402a              ANDS     r2,r2,r5
000262  604a              STR      r2,[r1,#4]
;;;136        SYS->P5_MFP |= SYS_MFP_P53_AIN0;  
000264  684a              LDR      r2,[r1,#4]
000266  2508              MOVS     r5,#8
000268  432a              ORRS     r2,r2,r5
00026a  604a              STR      r2,[r1,#4]
;;;137    
;;;138    	/* Set multi-function pins for ADC for battery */
;;;139        SYS->P3_MFP &= ~SYS_MFP_P31_Msk;
00026c  6bc2              LDR      r2,[r0,#0x3c]
00026e  105d              ASRS     r5,r3,#1
000270  402a              ANDS     r2,r2,r5
000272  63c2              STR      r2,[r0,#0x3c]
;;;140        SYS->P3_MFP |= SYS_MFP_P31_AIN7;  
000274  6bc2              LDR      r2,[r0,#0x3c]
000276  0065              LSLS     r5,r4,#1
000278  432a              ORRS     r2,r2,r5
00027a  63c2              STR      r2,[r0,#0x3c]
;;;141    
;;;142    	/* Set multi-function pins for ACMP output for debug */
;;;143        SYS->P3_MFP &= ~SYS_MFP_P36_Msk;
00027c  6bc2              LDR      r2,[r0,#0x3c]
00027e  4d7b              LDR      r5,|L1.1132|
000280  402a              ANDS     r2,r2,r5
000282  63c2              STR      r2,[r0,#0x3c]
;;;144        SYS->P3_MFP |= SYS_MFP_P36_CPO0;
000284  6bc2              LDR      r2,[r0,#0x3c]
000286  01a5              LSLS     r5,r4,#6
000288  432a              ORRS     r2,r2,r5
00028a  63c2              STR      r2,[r0,#0x3c]
;;;145        SYS->P5_MFP &= ~SYS_MFP_P50_Msk;
00028c  684a              LDR      r2,[r1,#4]
00028e  43a2              BICS     r2,r2,r4
000290  604a              STR      r2,[r1,#4]
;;;146        SYS->P5_MFP |= SYS_MFP_P50_GPIO;
000292  684a              LDR      r2,[r1,#4]
000294  604a              STR      r2,[r1,#4]
;;;147    
;;;148    	/* Set multi-function pins for ACMP */
;;;149        SYS->P1_MFP &= ~SYS_MFP_P14_Msk;
000296  6b41              LDR      r1,[r0,#0x34]
000298  4c75              LDR      r4,|L1.1136|
00029a  4021              ANDS     r1,r1,r4
00029c  6341              STR      r1,[r0,#0x34]
;;;150        SYS->P1_MFP |= SYS_MFP_P14_CPN0;  
00029e  6b42              LDR      r2,[r0,#0x34]
0002a0  10a9              ASRS     r1,r5,#2
0002a2  430a              ORRS     r2,r2,r1
0002a4  6342              STR      r2,[r0,#0x34]
;;;151    	// pp will changed in the 
;;;152    //    SYS->P1_MFP &= ~(SYS_MFP_P10_Msk | SYS_MFP_P13_Msk | SYS_MFP_P14_Msk | SYS_MFP_P15_Msk);
;;;153    //    SYS->P1_MFP |= (SYS_MFP_P10_CPP0 | SYS_MFP_P13_CPP0 | SYS_MFP_P14_CPN0 | SYS_MFP_P15_CPP0); 
;;;154    // 	          
;;;155        /* Set multi-function pins for PWM */
;;;156        SYS->P2_MFP &= ~(SYS_MFP_P22_Msk | SYS_MFP_P23_Msk | SYS_MFP_P24_Msk | SYS_MFP_P25_Msk | SYS_MFP_P26_Msk);
0002a6  6b82              LDR      r2,[r0,#0x38]
0002a8  4d72              LDR      r5,|L1.1140|
0002aa  402a              ANDS     r2,r2,r5
0002ac  6382              STR      r2,[r0,#0x38]
;;;157        SYS->P2_MFP = SYS_MFP_P22_PWM0 | SYS_MFP_P23_PWM1 | SYS_MFP_P24_PWM2 | SYS_MFP_P25_PWM3 |SYS_MFP_P26_PWM4;
0002ae  221f              MOVS     r2,#0x1f
0002b0  0292              LSLS     r2,r2,#10
0002b2  6382              STR      r2,[r0,#0x38]
;;;158        SYS->P0_MFP &= ~SYS_MFP_P04_Msk;
0002b4  6b02              LDR      r2,[r0,#0x30]
0002b6  4022              ANDS     r2,r2,r4
0002b8  6302              STR      r2,[r0,#0x30]
;;;159        SYS->P0_MFP |= SYS_MFP_P04_PWM5;  
0002ba  6b02              LDR      r2,[r0,#0x30]
0002bc  430a              ORRS     r2,r2,r1
0002be  6302              STR      r2,[r0,#0x30]
;;;160    
;;;161    	/* Set multi-function pins for EINT0 */
;;;162        SYS->P3_MFP &= ~SYS_MFP_P32_Msk;
0002c0  6bc1              LDR      r1,[r0,#0x3c]
0002c2  4019              ANDS     r1,r1,r3
0002c4  63c1              STR      r1,[r0,#0x3c]
;;;163        SYS->P3_MFP |= SYS_MFP_P32_INT0;  
0002c6  6bc1              LDR      r1,[r0,#0x3c]
0002c8  2204              MOVS     r2,#4
0002ca  4311              ORRS     r1,r1,r2
0002cc  63c1              STR      r1,[r0,#0x3c]
;;;164    	
;;;165    }
0002ce  bdf8              POP      {r3-r7,pc}
;;;166    
                          ENDP

                  TIM_Config PROC
;;;167    void TIM_Config(void)
0002d0  486a              LDR      r0,|L1.1148|
;;;168    {
;;;169    	// T0 used to change phase automatically
;;;170    	// T1 used to filter ZX
;;;171        TIMER0->TCSR  =  TIMER_TCSR_CRST_Msk | TIMER_PERIODIC_MODE | TIMER_TCSR_PERIODIC_SEL_Msk | TIMER_TCSR_TDR_EN_Msk + TIMER0_PRESCALE;   
0002d2  4969              LDR      r1,|L1.1144|
0002d4  6001              STR      r1,[r0,#0]
;;;172        TIMER1->TCSR  =  TIMER_TCSR_CRST_Msk | TIMER_CONTINUOUS_MODE | TIMER_TCSR_TDR_EN_Msk + TIMER1_PRESCALE; 
0002d6  496a              LDR      r1,|L1.1152|
0002d8  6201              STR      r1,[r0,#0x20]
;;;173        // TIMER1->TCSR |=  TIMER_TCSR_CEN_Msk ;    
;;;174    	//TIMER_EnableInt(TIMER0);                         
;;;175        //TIMER_EnableInt(TIMER1);
;;;176    }
0002da  4770              BX       lr
;;;177    
                          ENDP

                  ADC_Config PROC
;;;178    void ADC_Config(void)
0002dc  b510              PUSH     {r4,lr}
;;;179    {
;;;180    
;;;181        ADC_SetExtraSampleTime(ADC, 0 , ADC_SAMPLE_CLOCK_16);
0002de  4c69              LDR      r4,|L1.1156|
0002e0  2205              MOVS     r2,#5
0002e2  2100              MOVS     r1,#0
0002e4  4620              MOV      r0,r4
0002e6  f7fffffe          BL       ADC_SetExtraSampleTime
;;;182    
;;;183        // Enable channel 0 and 7 (Current and Battery)
;;;184    //    ADC_Open(ADC, 0, 0, ADC_BATTERY_CHN_MSK);	//ADC_CURRENT_CHN_MSK | ADC_BATTERY_CHN_MSK);	
;;;185    // Do NOT use this, it will clear all bit in ADCR
;;;186    
;;;187    
;;;188        // Power on ADC
;;;189        ADC_POWER_ON(ADC);
0002ea  6a20              LDR      r0,[r4,#0x20]
0002ec  2101              MOVS     r1,#1
0002ee  4308              ORRS     r0,r0,r1
0002f0  6220              STR      r0,[r4,#0x20]
;;;190    
;;;191        // ADC start triggered by TIM and take turn between current and battery
;;;192        // Use two ADC comparator to hardware trace the big cuurent or battery low
;;;193     
;;;194        // Configure and enable Comperator 0 to monitor channel 0(current) input greater or euqal to 93
;;;195        ADC_ENABLE_CMP0(ADC, ADC_CURRENT_CHN_IDX, ADC_CMP_GREATER_OR_EQUAL_TO, ADC_CURRENT_HIGH_THRS, ADC_CURRENT_HIGH_CNT);
0002f2  4865              LDR      r0,|L1.1160|
0002f4  62a0              STR      r0,[r4,#0x28]
;;;196        // Configure and enable Comperator 1 to monitor channel 7(battery) input less than 0x200	
;;;197        ADC_ENABLE_CMP1(ADC, ADC_BATTERY_CHN_IDX, ADC_CMP_LESS_THAN, ADC_BAT_LOW_THRS, ADC_BAT_LOW_CNT);    
0002f6  4865              LDR      r0,|L1.1164|
0002f8  62e0              STR      r0,[r4,#0x2c]
;;;198    
;;;199        // Enable ADC comparator 0 and 1 interrupt
;;;200        ADC_EnableInt(ADC, ADC_ADF_INT);
0002fa  4620              MOV      r0,r4
0002fc  f7fffffe          BL       ADC_EnableInt
;;;201        ADC_EnableInt(ADC, ADC_CMP0_INT);
000300  2102              MOVS     r1,#2
000302  4620              MOV      r0,r4
000304  f7fffffe          BL       ADC_EnableInt
;;;202        ADC_EnableInt(ADC, ADC_CMP1_INT);
000308  2104              MOVS     r1,#4
00030a  4620              MOV      r0,r4
00030c  f7fffffe          BL       ADC_EnableInt
;;;203    
;;;204        ADC_SET_INPUT_CHANNEL(ADC, ADC_BATTERY_CHN_MSK);
000310  6a60              LDR      r0,[r4,#0x24]
000312  0a00              LSRS     r0,r0,#8
000314  0200              LSLS     r0,r0,#8
000316  3080              ADDS     r0,r0,#0x80
000318  6260              STR      r0,[r4,#0x24]
;;;205        ADC_START_CONV(ADC);
00031a  6a20              LDR      r0,[r4,#0x20]
00031c  2101              MOVS     r1,#1
00031e  02c9              LSLS     r1,r1,#11
000320  4308              ORRS     r0,r0,r1
000322  6220              STR      r0,[r4,#0x20]
;;;206    }
000324  bd10              POP      {r4,pc}
;;;207    
                          ENDP

                  SPI_Config PROC
;;;208    void SPI_Config(void)
000326  b538              PUSH     {r3-r5,lr}
;;;209    {
;;;210    /*---------------------------------------------------------------------------------------------------------*/
;;;211    /* Init SPI                                                                                                */
;;;212    /*---------------------------------------------------------------------------------------------------------*/
;;;213        /* Configure as a slave, clock idle low, falling clock edge Tx, rising edge Rx and 32-bit transaction */
;;;214        /* Set IP clock divider. SPI clock rate = 10MHz */
;;;215        SPI_Close(SPI);
000328  4c59              LDR      r4,|L1.1168|
00032a  4620              MOV      r0,r4
00032c  f7fffffe          BL       SPI_Close
;;;216        SPI_ClearRxFIFO(SPI);
000330  4620              MOV      r0,r4
000332  f7fffffe          BL       SPI_ClearRxFIFO
;;;217        SPI_ClearTxFIFO(SPI);
000336  4620              MOV      r0,r4
000338  f7fffffe          BL       SPI_ClearTxFIFO
;;;218        // peripheral clock frequency of slave device must be faster than the bus clock frequency of the master
;;;219        SPI_Open(SPI, SPI_SLAVE, SPI_MODE_0, COMM_BIT_LENTH, COMM_BAUT_RATE);
00033c  4955              LDR      r1,|L1.1172|
00033e  2204              MOVS     r2,#4
000340  9100              STR      r1,[sp,#0]
000342  2311              MOVS     r3,#0x11
000344  0411              LSLS     r1,r2,#16
000346  4620              MOV      r0,r4
000348  f7fffffe          BL       SPI_Open
;;;220    
;;;221        /* Enable the automatic hardware slave select function. Select the SS pin and configure as low-active. */
;;;222        SPI_EnableAutoSS(SPI, SPI_SS, SPI_SS_ACTIVE_LOW);
00034c  2200              MOVS     r2,#0
00034e  2101              MOVS     r1,#1
000350  4620              MOV      r0,r4
000352  f7fffffe          BL       SPI_EnableAutoSS
;;;223    
;;;224        /* Use FIFO */
;;;225        //SPI_EnableFIFO(SPI, SPI_TX_FIFO_THRE, SPI_RX_FIFO_THRE);
;;;226        /* Enable SPI Unit Transfer Interrupt */
;;;227        SPI_EnableInt(SPI, SPI_IE_MASK);
000356  2101              MOVS     r1,#1
000358  4620              MOV      r0,r4
00035a  f7fffffe          BL       SPI_EnableInt
;;;228    }
00035e  bd38              POP      {r3-r5,pc}
;;;229    
                          ENDP

                  PWM_Init PROC
;;;235    
;;;236    void PWM_Init(void)
000360  b570              PUSH     {r4-r6,lr}
;;;237    {
;;;238        PWM_Stop(PWM, PWM_CHN_ALL_MSK);
000362  4c4d              LDR      r4,|L1.1176|
000364  213f              MOVS     r1,#0x3f
000366  4620              MOV      r0,r4
000368  f7fffffe          BL       PWM_Stop
;;;239        PWM_SET_PRESCALER(PWM, 0, PWM_CHN01_PRESCALER);
00036c  6820              LDR      r0,[r4,#0]
00036e  0a00              LSRS     r0,r0,#8
000370  0200              LSLS     r0,r0,#8
000372  1c40              ADDS     r0,r0,#1
000374  6020              STR      r0,[r4,#0]
;;;240    //    PWM_SET_PRESCALER(PWM, 1, PWM_CHN01_PRESCALER);
;;;241        PWM_SET_PRESCALER(PWM, 2, PWM_CHN23_PRESCALER);
000376  6820              LDR      r0,[r4,#0]
000378  21ff              MOVS     r1,#0xff
00037a  0209              LSLS     r1,r1,#8
00037c  4388              BICS     r0,r0,r1
00037e  30ff              ADDS     r0,r0,#0xff
000380  3001              ADDS     r0,#1
000382  6020              STR      r0,[r4,#0]
;;;242    //    PWM_SET_PRESCALER(PWM, 3, PWM_CHN23_PRESCALER);
;;;243        PWM_SET_PRESCALER(PWM, 4, PWM_CHN45_PRESCALER);
000384  6820              LDR      r0,[r4,#0]
000386  0209              LSLS     r1,r1,#8
000388  4388              BICS     r0,r0,r1
00038a  2101              MOVS     r1,#1
00038c  0409              LSLS     r1,r1,#16
00038e  1840              ADDS     r0,r0,r1
000390  6020              STR      r0,[r4,#0]
;;;244    //    PWM_SET_PRESCALER(PWM, 5, PWM_CHN45_PRESCALER);
;;;245        PWM_SET_DIVIDER(PWM, 0, PWM_CLK_DIV_1);
000392  6860              LDR      r0,[r4,#4]
000394  08c0              LSRS     r0,r0,#3
000396  00c0              LSLS     r0,r0,#3
000398  1d00              ADDS     r0,r0,#4
00039a  6060              STR      r0,[r4,#4]
;;;246        PWM_SET_DIVIDER(PWM, 1, PWM_CLK_DIV_1);
00039c  6860              LDR      r0,[r4,#4]
00039e  2170              MOVS     r1,#0x70
0003a0  4388              BICS     r0,r0,r1
0003a2  3040              ADDS     r0,r0,#0x40
0003a4  6060              STR      r0,[r4,#4]
;;;247        PWM_SET_DIVIDER(PWM, 2, PWM_CLK_DIV_1);
0003a6  6860              LDR      r0,[r4,#4]
0003a8  0109              LSLS     r1,r1,#4
0003aa  4388              BICS     r0,r0,r1
0003ac  1521              ASRS     r1,r4,#20
0003ae  1840              ADDS     r0,r0,r1
0003b0  6060              STR      r0,[r4,#4]
;;;248        PWM_SET_DIVIDER(PWM, 3, PWM_CLK_DIV_1);
0003b2  6860              LDR      r0,[r4,#4]
0003b4  2107              MOVS     r1,#7
0003b6  0309              LSLS     r1,r1,#12
0003b8  4388              BICS     r0,r0,r1
0003ba  2101              MOVS     r1,#1
0003bc  0389              LSLS     r1,r1,#14
0003be  1840              ADDS     r0,r0,r1
0003c0  6060              STR      r0,[r4,#4]
;;;249        PWM_SET_DIVIDER(PWM, 4, PWM_CLK_DIV_1);
0003c2  6860              LDR      r0,[r4,#4]
0003c4  2107              MOVS     r1,#7
0003c6  0409              LSLS     r1,r1,#16
0003c8  4388              BICS     r0,r0,r1
0003ca  2101              MOVS     r1,#1
0003cc  0489              LSLS     r1,r1,#18
0003ce  1840              ADDS     r0,r0,r1
0003d0  6060              STR      r0,[r4,#4]
;;;250        PWM_SET_DIVIDER(PWM, 5, PWM_CLK_DIV_1);
0003d2  6860              LDR      r0,[r4,#4]
0003d4  2107              MOVS     r1,#7
0003d6  0509              LSLS     r1,r1,#20
0003d8  4388              BICS     r0,r0,r1
0003da  0121              LSLS     r1,r4,#4
0003dc  1840              ADDS     r0,r0,r1
0003de  6060              STR      r0,[r4,#4]
;;;251    
;;;252    //    PWM->PCR = PCR_CLR_COUNTER | PCR_DEBUG_MODE | PCR_CH_EN(0) | PCR_PERIOD_MODE(0) |
;;;253    //		PCR_CH_EN(1) | PCR_PERIOD_MODE(1) | PCR_CH_EN(2) | PCR_PERIOD_MODE(2) |
;;;254    //		PCR_CH_EN(3) | PCR_PERIOD_MODE(3) | PCR_CH_EN(4) | PCR_PERIOD_MODE(4) |
;;;255    //		PCR_CH_EN(5) | PCR_PERIOD_MODE(5) |
;;;256    //		PCR_INV_EN(0) | PCR_INV_EN(2) | PCR_INV_EN(4) |
;;;257    //		PCR_INV_EN(1) | PCR_INV_EN(3) | PCR_INV_EN(5);
;;;258        PWM->PCR = PCR_CLR_COUNTER | PCR_DEBUG_MODE |
0003e0  482e              LDR      r0,|L1.1180|
0003e2  60a0              STR      r0,[r4,#8]
;;;259    		PCR_CH_EN(0) | PCR_PERIOD_MODE(0) |  
;;;260    		PCR_CH_EN(1) | PCR_PERIOD_MODE(1) | 
;;;261    		PCR_CH_EN(2) | PCR_PERIOD_MODE(2) | 
;;;262    		PCR_CH_EN(3) | PCR_PERIOD_MODE(3) | 
;;;263    		PCR_CH_EN(4) | PCR_PERIOD_MODE(4) | 
;;;264    		PCR_CH_EN(5) | PCR_PERIOD_MODE(5) |
;;;265    		PCR_INV_EN(0) | PCR_INV_EN(2) | PCR_INV_EN(4) |
;;;266    		PCR_INV_EN(1) | PCR_INV_EN(3) | PCR_INV_EN(5);
;;;267    //    PWM_SET_ALIGNED_TYPE(PWM_EDGE_ALIGNED);
;;;268    //    PWM_ENABLE_GROUP_MODE(PWM);
;;;269        PWM->CMR[0] = 0;
0003e4  2500              MOVS     r5,#0
0003e6  6265              STR      r5,[r4,#0x24]
;;;270        PWM->CMR[1] = 0;
0003e8  62a5              STR      r5,[r4,#0x28]
;;;271        PWM->CMR[2] = 0;
0003ea  62e5              STR      r5,[r4,#0x2c]
;;;272        PWM->CMR[3] = 0;
0003ec  6325              STR      r5,[r4,#0x30]
;;;273        PWM->CMR[4] = 0;
0003ee  6365              STR      r5,[r4,#0x34]
;;;274        PWM->CMR[5] = 0;
0003f0  63a5              STR      r5,[r4,#0x38]
;;;275        PWM->CNR[0] = PWM_PERIOD; 
0003f2  482b              LDR      r0,|L1.1184|
0003f4  60e0              STR      r0,[r4,#0xc]
;;;276        PWM->CNR[1] = PWM_PERIOD;    
0003f6  6120              STR      r0,[r4,#0x10]
;;;277        PWM->CNR[2] = PWM_PERIOD;                                    
0003f8  6160              STR      r0,[r4,#0x14]
;;;278        PWM->CNR[3] = PWM_PERIOD;
0003fa  61a0              STR      r0,[r4,#0x18]
;;;279        PWM->CNR[4] = PWM_PERIOD; 
0003fc  61e0              STR      r0,[r4,#0x1c]
;;;280        PWM->CNR[5] = PWM_PERIOD;
0003fe  6220              STR      r0,[r4,#0x20]
;;;281        PWM_EnableOutput(PWM, PWM_CHN_ALL_MSK);
000400  213f              MOVS     r1,#0x3f
000402  4620              MOV      r0,r4
000404  f7fffffe          BL       PWM_EnableOutput
;;;282        PWM_INT_DISABLE;	// Disable all PWM interrupt 
000408  4823              LDR      r0,|L1.1176|
00040a  3040              ADDS     r0,r0,#0x40
00040c  6145              STR      r5,[r0,#0x14]
;;;283        stopMotor();
00040e  f7fffffe          BL       stopMotor
;;;284        //MOTOR_SHUT_DOWN;
;;;285    
;;;286        // PWM duty change every each phase for both ramp up and locked state
;;;287    //    PWM->INTACCUCTL = 0x41; // Every 4 PWM periods change duty
;;;288    			    // this will be used in locked time
;;;289    			    // During startup ramp, duty change every x E-Circle
;;;290        PWM->PHCHGMASK = PHCHG_CTL_CMP0;	// Input of ACMP0 is controlled by PHCHG
000412  15a0              ASRS     r0,r4,#22
000414  4920              LDR      r1,|L1.1176|
000416  e045              B        |L1.1188|
                  |L1.1048|
                          DCD      0xe000ed00
                  |L1.1052|
                          DCD      0xe000e400
                  |L1.1056|
                          DCD      0x50000200
                  |L1.1060|
                          DCD      0x260c03e0
                  |L1.1064|
                          DCD      0x2623fe1c
                  |L1.1068|
                          DCD      0x27cc03f4
                  |L1.1072|
                          DCD      0x27ec03f5
                  |L1.1076|
                          DCD      0x664c03f6
                  |L1.1080|
                          DCD      0x27803d10
                  |L1.1084|
                          DCD      0x2e8c03e2
                  |L1.1088|
                          DCD      0x2ecc03e3
                  |L1.1092|
                          DCD      0x224c03ec
                  |L1.1096|
                          DCD      0x61fc03fe
                  |L1.1100|
                          DCD      0x500040c0
                  |L1.1104|
                          DCD      0x50004240
                  |L1.1108|
                          DCD      0xfefffefe
                  |L1.1112|
                          DCD      0xfffffbfb
                  |L1.1116|
                          DCD      0xfdff1d1d
                  |L1.1120|
                          DCD      0x0000e002
                  |L1.1124|
                          DCD      0x50000040
                  |L1.1128|
                          DCD      0xfffff7f7
                  |L1.1132|
                          DCD      0xffffbfbf
                  |L1.1136|
                          DCD      0xffffefef
                  |L1.1140|
                          DCD      0xffff8383
                  |L1.1144|
                          DCD      0x0c03000a
                  |L1.1148|
                          DCD      0x40010000
                  |L1.1152|
                          DCD      0x1c01000a
                  |L1.1156|
                          DCD      0x400e0000
                  |L1.1160|
                          DCD      0x00440b05
                  |L1.1164|
                          DCD      0x015c0f39
                  |L1.1168|
                          DCD      0x40030000
                  |L1.1172|
                          DCD      0x004c4b40
                  |L1.1176|
                          DCD      0x40040000
                  |L1.1180|
                          DCD      0x08dddddf
                  |L1.1184|
                          DCD      0x00000373
                  |L1.1188|
0004a4  3180              ADDS     r1,r1,#0x80
0004a6  6008              STR      r0,[r1,#0]
;;;291    }
0004a8  bd70              POP      {r4-r6,pc}
;;;292    
                          ENDP

                  SYS_Init PROC
;;;293    void SYS_Init(void)
0004aa  b510              PUSH     {r4,lr}
;;;294    {
;;;295        /* Unlock protected registers */
;;;296        SYS_UnlockReg();
0004ac  f7fffffe          BL       SYS_UnlockReg
;;;297        
;;;298        /* Clock initialization, Enable PWM, ADC, TIM, UART clock */
;;;299        CLK_Init();
0004b0  f7fffffe          BL       CLK_Init
;;;300        //CLK->APBCLK = CLK_APBCLK_UART_EN_Msk;
;;;301        
;;;302        /* Update System Core Clock */
;;;303        /* User can use SystemCoreClockUpdate() to calculate SystemCoreClock and cyclesPerUs automatically. */
;;;304        SystemCoreClockUpdate(); 
0004b4  f7fffffe          BL       SystemCoreClockUpdate
0004b8  4c3e              LDR      r4,|L1.1460|
0004ba  483d              LDR      r0,|L1.1456|
0004bc  6160              STR      r0,[r4,#0x14]
0004be  2103              MOVS     r1,#3
0004c0  1f08              SUBS     r0,r1,#4
0004c2  f7fffffe          BL       NVIC_SetPriority
0004c6  2000              MOVS     r0,#0
0004c8  61a0              STR      r0,[r4,#0x18]
0004ca  2007              MOVS     r0,#7
0004cc  6120              STR      r0,[r4,#0x10]
;;;305    
;;;306        /* System tick Configuration */
;;;307        // SYS TICK interrupt will be entered every 5ms
;;;308        SysTick_Config(SYS_TICK_RELOAD_VALUE);
;;;309        
;;;310        /* PWM Configuration */
;;;311        // Close all MOSFET here first, then output GPIO
;;;312        PWM_Init();
0004ce  f7fffffe          BL       PWM_Init
;;;313          
;;;314        /* IO Configuration */
;;;315        GPIO_Init();
0004d2  f7fffffe          BL       GPIO_Init
;;;316    
;;;317        /* ACMP initialization */
;;;318        //ACMP_Config();
;;;319    
;;;320        /* ADC initialization */
;;;321        ADC_Config();
0004d6  f7fffffe          BL       ADC_Config
;;;322    
;;;323        /* TIM initialization */
;;;324        TIM_Config();
0004da  f7fffffe          BL       TIM_Config
;;;325    
;;;326        /* SPI initialization */
;;;327        SPI_Config();
0004de  f7fffffe          BL       SPI_Config
;;;328    
;;;329        /* Enable all interrupt from NVIC */
;;;330        IRQ_Init();
0004e2  f7fffffe          BL       IRQ_Init
;;;331    
;;;332        /* Lock protected registers */
;;;333        SYS_LockReg();
0004e6  f7fffffe          BL       SYS_LockReg
;;;334                             
;;;335    }    
0004ea  bd10              POP      {r4,pc}
;;;336    
                          ENDP

                  main PROC
;;;339    //	uint32_t iLeaveTime;
;;;340    int main()
0004ec  f7fffffe          BL       SYS_Init
;;;341    {
;;;342    
;;;343        SYS_Init();
;;;344    //	TIMER_Start(TIMER1);
;;;345    //	imsTest = 0;
;;;346    //
;;;347    //	iEntreTime = TIMER_GetCounter(TIMER1);
;;;348    //	while ((PWM->PIIR & PWM_PIIR_PWMPIF1_Msk))
;;;349    //	{
;;;350    ////		BRG_DISABLE;
;;;351    ////		stopMotor();
;;;352    //		if (imsTest > 1000)
;;;353    //		{
;;;354    //			break;
;;;355    //		}
;;;356    //
;;;357    //		if (ACMP0_EDGE_MATCH)
;;;358    //		{
;;;359    //			imsTest = 0;
;;;360    //		}
;;;361    //		else
;;;362    //		{
;;;363    //			imsTest++;
;;;364    //		}
;;;365    //
;;;366    //	}
;;;367    //	iLeaveTime = TIMER_GetCounter(TIMER1);
;;;368        /* ---=== Interrupt already enabled so communication can start ===--- */
;;;369    
;;;370        // reset motor state machine to stop
;;;371        // power was already stopped providing to motor and 
;;;372        // enumMotorState was already initialized in PWM_Init()
;;;373        //stopMotor();
;;;374    
;;;375        /* Init UART to 115200-8n1 for print message */
;;;376        /* This MCU don't have DMA, need to use interrupt to make un-polling UART TX */
;;;377        /* Now better not to use printf after motor was started, in future if needed will write one */
;;;378        UART_Open(UART, 115200);
0004f0  21e1              MOVS     r1,#0xe1
0004f2  0249              LSLS     r1,r1,#9
0004f4  4830              LDR      r0,|L1.1464|
0004f6  f7fffffe          BL       UART_Open
;;;379       
;;;380        printf("Hello World\n");
0004fa  a030              ADR      r0,|L1.1468|
0004fc  f7fffffe          BL       __2printf
;;;381    
;;;382        checkMotor();
000500  f7fffffe          BL       checkMotor
;;;383    
;;;384        /* ----==== Here is the parameter used for test ====----*/
;;;385        // Max PWM Duty is: PWM_PERIOD = 441
;;;386        // Max Period is:
;;;387        MOTOR_SHUT_DOWN;
000504  4931              LDR      r1,|L1.1484|
000506  2000              MOVS     r0,#0
000508  6208              STR      r0,[r1,#0x20]
00050a  4a31              LDR      r2,|L1.1488|
00050c  6150              STR      r0,[r2,#0x14]
00050e  4831              LDR      r0,|L1.1492|
000510  6801              LDR      r1,[r0,#0]
000512  0383              LSLS     r3,r0,#14
000514  4399              BICS     r1,r1,r3
000516  6001              STR      r1,[r0,#0]
000518  492e              LDR      r1,|L1.1492|
00051a  3120              ADDS     r1,r1,#0x20
00051c  680c              LDR      r4,[r1,#0]
00051e  439c              BICS     r4,r4,r3
000520  600c              STR      r4,[r1,#0]
000522  6804              LDR      r4,[r0,#0]
000524  0343              LSLS     r3,r0,#13
000526  439c              BICS     r4,r4,r3
000528  6004              STR      r4,[r0,#0]
00052a  6808              LDR      r0,[r1,#0]
00052c  4398              BICS     r0,r0,r3
00052e  6008              STR      r0,[r1,#0]
000530  20ff              MOVS     r0,#0xff
000532  63d0              STR      r0,[r2,#0x3c]
000534  6390              STR      r0,[r2,#0x38]
;;;388    
;;;389        mMotor.structMotor.LCT_DUTY = 200;
000536  4c28              LDR      r4,|L1.1496|
000538  20c8              MOVS     r0,#0xc8
00053a  80e0              STRH     r0,[r4,#6]
;;;390        mMotor.structMotor.LCT_PERIOD = 10;	// Unit ms
00053c  200a              MOVS     r0,#0xa
00053e  81e0              STRH     r0,[r4,#0xe]
;;;391        mMotor.structMotor.RU_DUTY = 320;
000540  0140              LSLS     r0,r0,#5
000542  8120              STRH     r0,[r4,#8]
;;;392        mMotor.structMotor.RU_PERIOD = 8000;	// Unit 2MH, 20ms, 500rpm
000544  207d              MOVS     r0,#0x7d
000546  0180              LSLS     r0,r0,#6
000548  6120              STR      r0,[r4,#0x10]  ; mMotor
;;;393        mMotor.structMotor.TGT_DUTY = 400;
00054a  20ff              MOVS     r0,#0xff
00054c  3091              ADDS     r0,r0,#0x91
00054e  8160              STRH     r0,[r4,#0xa]
;;;394    	mMotor.structMotor.MCR.RotateDirection = ROTATE_CLOCKWISE;	// Clockwise
000550  8820              LDRH     r0,[r4,#0]  ; mMotor
000552  2102              MOVS     r1,#2
000554  4388              BICS     r0,r0,r1
000556  8020              STRH     r0,[r4,#0]
;;;395        mMotor.structMotor.MCR.MotorNeedToRun = TRUE;
000558  8820              LDRH     r0,[r4,#0]  ; mMotor
00055a  2101              MOVS     r1,#1
00055c  4308              ORRS     r0,r0,r1
00055e  8020              STRH     r0,[r4,#0]
;;;396        /* ----=============== Test End ================---- */
;;;397    
;;;398        while(1)
;;;399        {
;;;400    //	if (TIMER_GetCounter(TIMER0) > 100 && TIMER_GetCounter(TIMER0) < 1000)
;;;401    //	{
;;;402    //	    imsTest = iSystemTick;
;;;403    //	}
;;;404    //	if (TIMER_GetCounter(TIMER0) > 30000 && TIMER_GetCounter(TIMER0) < 31000)
;;;405    //	{
;;;406    //	    imsTest = iSystemTick;
;;;407    //	}
;;;408    		BLDCSensorLessManager(); 
;;;409    		//	CommunicationManager();
;;;410    		ErrorManager();
;;;411    
;;;412    		// For test
;;;413    		if (TRUE == mMotor.structMotor.MSR.Locked)
;;;414    		{
;;;415    			if (iSystemTick%5000 == 0)
000560  4f1e              LDR      r7,|L1.1500|
;;;416    			{
;;;417    				if (iTestSpeedLastTime != iSystemTick)
;;;418    				{
;;;419    					iTestSpeedLastTime = iSystemTick;
;;;420    					mMotor.structMotor.TGT_DUTY = iTestSpeedSequence[iTestSpeedSequenIndex];
000562  4e1f              LDR      r6,|L1.1504|
000564  4d1f              LDR      r5,|L1.1508|
                  |L1.1382|
000566  f7fffffe          BL       BLDCSensorLessManager
00056a  f7fffffe          BL       ErrorManager
00056e  8860              LDRH     r0,[r4,#2]            ;413  ; mMotor
000570  0740              LSLS     r0,r0,#29             ;413
000572  d5f8              BPL      |L1.1382|
000574  4639              MOV      r1,r7                 ;415
000576  68a8              LDR      r0,[r5,#8]            ;415  ; iSystemTick
000578  f7fffffe          BL       __aeabi_uidivmod
00057c  2900              CMP      r1,#0                 ;415
00057e  d1f2              BNE      |L1.1382|
000580  68a9              LDR      r1,[r5,#8]            ;417  ; iSystemTick
000582  6868              LDR      r0,[r5,#4]            ;417  ; iTestSpeedLastTime
000584  4288              CMP      r0,r1                 ;417
000586  d0ee              BEQ      |L1.1382|
000588  68a8              LDR      r0,[r5,#8]            ;419  ; iSystemTick
00058a  6068              STR      r0,[r5,#4]  ; iTestSpeedLastTime
00058c  7828              LDRB     r0,[r5,#0]  ; iTestSpeedSequenIndex
00058e  0042              LSLS     r2,r0,#1
000590  5ab2              LDRH     r2,[r6,r2]
000592  8162              STRH     r2,[r4,#0xa]
;;;421    					INDEX_INCREASE(iTestSpeedSequenIndex, TEST_SPEED_SEQUENCE_NUM);
000594  280a              CMP      r0,#0xa
000596  d201              BCS      |L1.1436|
000598  1c40              ADDS     r0,r0,#1
00059a  e000              B        |L1.1438|
                  |L1.1436|
00059c  2000              MOVS     r0,#0
                  |L1.1438|
00059e  7028              STRB     r0,[r5,#0]
0005a0  e7e1              B        |L1.1382|
;;;422    				}
;;;423    			}
;;;424    		}
;;;425    	}
;;;426    
;;;427    }
;;;428    
                          ENDP

                  NVIC_EnableIRQ PROC
;;;503     */
;;;504    __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
0005a2  06c1              LSLS     r1,r0,#27
;;;505    {
;;;506      NVIC->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
0005a4  0ec9              LSRS     r1,r1,#27
0005a6  2001              MOVS     r0,#1
0005a8  4088              LSLS     r0,r0,r1
0005aa  490f              LDR      r1,|L1.1512|
0005ac  6008              STR      r0,[r1,#0]
;;;507    }
0005ae  4770              BX       lr
;;;508    
                          ENDP

                  |L1.1456|
                          DCD      0x0001affe
                  |L1.1460|
                          DCD      0xe000e000
                  |L1.1464|
                          DCD      0x40050000
                  |L1.1468|
0005bc  48656c6c          DCB      "Hello World\n",0
0005c0  6f20576f
0005c4  726c640a
0005c8  00      
0005c9  00                DCB      0
0005ca  00                DCB      0
0005cb  00                DCB      0
                  |L1.1484|
                          DCD      0x50004240
                  |L1.1488|
                          DCD      0x40040040
                  |L1.1492|
                          DCD      0x40010000
                  |L1.1496|
                          DCD      mMotor
                  |L1.1500|
                          DCD      0x00001388
                  |L1.1504|
                          DCD      ||.constdata||
                  |L1.1508|
                          DCD      ||.data||
                  |L1.1512|
                          DCD      0xe000e100

                          AREA ||.constdata||, DATA, READONLY, ALIGN=1

                  iTestSpeedSequence
000000  00fa012c          DCW      0x00fa,0x012c
000004  015e0190          DCW      0x015e,0x0190
000008  01c2012c          DCW      0x01c2,0x012c
00000c  019000fa          DCW      0x0190,0x00fa
000010  00c801c2          DCW      0x00c8,0x01c2
000014  00c8              DCW      0x00c8

                          AREA ||.data||, DATA, ALIGN=2

                  iTestSpeedSequenIndex
000000  00000000          DCB      0x00,0x00,0x00,0x00
                  iTestSpeedLastTime
                          DCD      0x00000000
                  iSystemTick
                          DCD      0x00000000

;*** Start embedded assembler ***

#line 1 "User\\main.c"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___6_main_c_0ca38777____REV16|
#line 118 ".\\CMSIS\\core_cmInstr.h"
|__asm___6_main_c_0ca38777____REV16| PROC
#line 119

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___6_main_c_0ca38777____REVSH|
#line 132
|__asm___6_main_c_0ca38777____REVSH| PROC
#line 133

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***

                  __ARM_use_no_argv EQU 0
