; generated by Component: ARM Compiler 5.05 (build 41) Tool: ArmCC [4d0eb9]
; commandline ArmCC [--list --debug -c --asm --interleave -o.\obj\adc.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\adc.d --cpu=Cortex-M0 --apcs=interwork -I..\..\..\Library\CMSIS\Include -I..\..\..\Library\Device\Nuvoton\Mini51Series\Include -I..\..\..\Library\StdDriver\inc -I.\StdDriver\inc -I.\CMSIS -IG:\Geek\Projects\Zulolo_F\Force\Code\Zulolo_F_Force\RTE -ID:\Keil_v5\ARM\PACK\Nuvoton\NuMicro_DFP\1.0.2\Device\Mini51\Include -ID:\Keil_v5\ARM\CMSIS\Include -I\ -D__MICROLIB --omf_browse=.\obj\adc.crf StdDriver\src\adc.c]
                          THUMB

                          AREA ||.text||, CODE, READONLY, ALIGN=2

                  ADC_Open PROC
;;;36       */
;;;37     void ADC_Open(ADC_T *adc,
000000  4830              LDR      r0,|L1.196|
;;;38                   uint32_t u32InputMode, 
;;;39                   uint32_t u32OpMode,  
;;;40                   uint32_t u32ChMask)
;;;41     {
;;;42     
;;;43         ADC->ADCR = 0;  // A clean start. 
000002  2100              MOVS     r1,#0
000004  6201              STR      r1,[r0,#0x20]
;;;44         ADC->ADCHER  = (ADC->ADCHER & ~ADC_ADCHER_CHEN_Msk) | u32ChMask;
000006  6a41              LDR      r1,[r0,#0x24]
000008  0a09              LSRS     r1,r1,#8
00000a  0209              LSLS     r1,r1,#8
00000c  4319              ORRS     r1,r1,r3
00000e  6241              STR      r1,[r0,#0x24]
;;;45         return;
;;;46     }
000010  4770              BX       lr
;;;47     
                          ENDP

                  ADC_Close PROC
;;;52       */
;;;53     void ADC_Close(ADC_T *adc)
000012  2005              MOVS     r0,#5
;;;54     {
;;;55         SYS->IPRSTC2 |= SYS_IPRSTC2_ADC_RST_Msk;
000014  0700              LSLS     r0,r0,#28
000016  68c2              LDR      r2,[r0,#0xc]
000018  2101              MOVS     r1,#1
00001a  0709              LSLS     r1,r1,#28
00001c  430a              ORRS     r2,r2,r1
00001e  60c2              STR      r2,[r0,#0xc]
;;;56         SYS->IPRSTC2 &= ~SYS_IPRSTC2_ADC_RST_Msk;    
000020  68c2              LDR      r2,[r0,#0xc]
000022  438a              BICS     r2,r2,r1
000024  60c2              STR      r2,[r0,#0xc]
;;;57         return;
;;;58     
;;;59     }
000026  4770              BX       lr
;;;60     
                          ENDP

                  ADC_EnableHWTrigger PROC
;;;74       */
;;;75     void ADC_EnableHWTrigger(ADC_T *adc,
000028  b510              PUSH     {r4,lr}
;;;76                              uint32_t u32Source,
;;;77                              uint32_t u32Param)
;;;78     {
;;;79         ADC->ADCR &= ~(ADC_TRIGGER_BY_PWM | ADC_RISING_EDGE_TRIGGER | ADC_ADCR_TRGEN_Msk);
00002a  4826              LDR      r0,|L1.196|
00002c  6a03              LDR      r3,[r0,#0x20]
00002e  24ff              MOVS     r4,#0xff
000030  3471              ADDS     r4,r4,#0x71
000032  43a3              BICS     r3,r3,r4
000034  6203              STR      r3,[r0,#0x20]
;;;80         if(u32Source == ADC_TRIGGER_BY_EXT_PIN) {
;;;81             ADC->ADCR |= u32Source | u32Param | ADC_ADCR_TRGEN_Msk;
000036  1583              ASRS     r3,r0,#22
000038  2900              CMP      r1,#0                 ;80
00003a  d009              BEQ      |L1.80|
;;;82         } else {
;;;83             ADC->ADTDCR = (ADC->ADTDCR & ~ADC_ADTDCR_PTDT_Msk) | u32Param;
00003c  6b44              LDR      r4,[r0,#0x34]
00003e  0a24              LSRS     r4,r4,#8
000040  0224              LSLS     r4,r4,#8
000042  4314              ORRS     r4,r4,r2
000044  6344              STR      r4,[r0,#0x34]
;;;84             ADC->ADCR |= u32Source | ADC_ADCR_TRGEN_Msk;
000046  6a02              LDR      r2,[r0,#0x20]
000048  4319              ORRS     r1,r1,r3
00004a  430a              ORRS     r2,r2,r1
00004c  6202              STR      r2,[r0,#0x20]
;;;85         }    
;;;86         return;
;;;87     }
00004e  bd10              POP      {r4,pc}
                  |L1.80|
000050  6a01              LDR      r1,[r0,#0x20]         ;81
000052  431a              ORRS     r2,r2,r3              ;81
000054  4311              ORRS     r1,r1,r2              ;81
000056  6201              STR      r1,[r0,#0x20]         ;81
000058  bd10              POP      {r4,pc}
;;;88     
                          ENDP

                  ADC_DisableHWTrigger PROC
;;;93       */
;;;94     void ADC_DisableHWTrigger(ADC_T *adc)
00005a  481a              LDR      r0,|L1.196|
;;;95     {
;;;96         ADC->ADCR &= ~(ADC_TRIGGER_BY_PWM | ADC_RISING_EDGE_TRIGGER | ADC_ADCR_TRGEN_Msk);
00005c  6a01              LDR      r1,[r0,#0x20]
00005e  22ff              MOVS     r2,#0xff
000060  3271              ADDS     r2,r2,#0x71
000062  4391              BICS     r1,r1,r2
000064  6201              STR      r1,[r0,#0x20]
;;;97         return;
;;;98     }
000066  4770              BX       lr
;;;99     
                          ENDP

                  ADC_SetExtraSampleTime PROC
;;;118      */
;;;119    void ADC_SetExtraSampleTime(ADC_T *adc,
000068  4816              LDR      r0,|L1.196|
;;;120                                uint32_t u32ChNum,
;;;121                                uint32_t u32SampleTime)
;;;122    {
;;;123        ADC->ADSAMP = (ADC->ADSAMP & ~ADC_ADSAMP_SAMPCNT_Msk) | u32SampleTime;
00006a  6b81              LDR      r1,[r0,#0x38]
00006c  0909              LSRS     r1,r1,#4
00006e  0109              LSLS     r1,r1,#4
000070  4311              ORRS     r1,r1,r2
000072  6381              STR      r1,[r0,#0x38]
;;;124    }
000074  4770              BX       lr
;;;125    
                          ENDP

                  ADC_EnableInt PROC
;;;136      */
;;;137    void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask)
000076  07cb              LSLS     r3,r1,#31
;;;138    {
;;;139        if(u32Mask & ADC_ADF_INT)
;;;140            ADC->ADCR |= ADC_ADCR_ADIE_Msk;
000078  4812              LDR      r0,|L1.196|
00007a  2202              MOVS     r2,#2
00007c  2b00              CMP      r3,#0                 ;139
00007e  d002              BEQ      |L1.134|
000080  6a03              LDR      r3,[r0,#0x20]
000082  4313              ORRS     r3,r3,r2
000084  6203              STR      r3,[r0,#0x20]
                  |L1.134|
;;;141        if(u32Mask & ADC_CMP0_INT)
000086  078b              LSLS     r3,r1,#30
000088  d502              BPL      |L1.144|
;;;142            ADC->ADCMPR[0] |= ADC_ADCMPR_CMPIE_Msk;
00008a  6a83              LDR      r3,[r0,#0x28]
00008c  4313              ORRS     r3,r3,r2
00008e  6283              STR      r3,[r0,#0x28]
                  |L1.144|
;;;143        if(u32Mask & ADC_CMP1_INT)
000090  0749              LSLS     r1,r1,#29
000092  d502              BPL      |L1.154|
;;;144            ADC->ADCMPR[1] |= ADC_ADCMPR_CMPIE_Msk;        
000094  6ac1              LDR      r1,[r0,#0x2c]
000096  4311              ORRS     r1,r1,r2
000098  62c1              STR      r1,[r0,#0x2c]
                  |L1.154|
;;;145        
;;;146        return;
;;;147    }                   
00009a  4770              BX       lr
;;;148    
                          ENDP

                  ADC_DisableInt PROC
;;;159      */
;;;160    void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask)
00009c  07cb              LSLS     r3,r1,#31
;;;161    {
;;;162        if(u32Mask & ADC_ADF_INT)
;;;163            ADC->ADCR &= ~ADC_ADCR_ADIE_Msk;
00009e  4809              LDR      r0,|L1.196|
0000a0  2202              MOVS     r2,#2
0000a2  2b00              CMP      r3,#0                 ;162
0000a4  d002              BEQ      |L1.172|
0000a6  6a03              LDR      r3,[r0,#0x20]
0000a8  4393              BICS     r3,r3,r2
0000aa  6203              STR      r3,[r0,#0x20]
                  |L1.172|
;;;164        if(u32Mask & ADC_CMP0_INT)
0000ac  078b              LSLS     r3,r1,#30
0000ae  d502              BPL      |L1.182|
;;;165            ADC->ADCMPR[0] &= ~ADC_ADCMPR_CMPIE_Msk;
0000b0  6a83              LDR      r3,[r0,#0x28]
0000b2  4393              BICS     r3,r3,r2
0000b4  6283              STR      r3,[r0,#0x28]
                  |L1.182|
;;;166        if(u32Mask & ADC_CMP1_INT)
0000b6  0749              LSLS     r1,r1,#29
0000b8  d502              BPL      |L1.192|
;;;167            ADC->ADCMPR[1] &= ~ADC_ADCMPR_CMPIE_Msk;        
0000ba  6ac1              LDR      r1,[r0,#0x2c]
0000bc  4391              BICS     r1,r1,r2
0000be  62c1              STR      r1,[r0,#0x2c]
                  |L1.192|
;;;168        
;;;169        return;
;;;170    }
0000c0  4770              BX       lr
;;;171    
                          ENDP

0000c2  0000              DCW      0x0000
                  |L1.196|
                          DCD      0x400e0000

;*** Start embedded assembler ***

#line 1 "StdDriver\\src\\adc.c"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___5_adc_c_ADC_Open____REV16|
#line 118 ".\\CMSIS\\core_cmInstr.h"
|__asm___5_adc_c_ADC_Open____REV16| PROC
#line 119

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___5_adc_c_ADC_Open____REVSH|
#line 132
|__asm___5_adc_c_ADC_Open____REVSH| PROC
#line 133

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
