; generated by Component: ARM Compiler 5.04 update 1 (build 49) Tool: ArmCC [5040049]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\obj\main.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\main.d --cpu=Cortex-M0 --apcs=interwork -I..\..\..\..\Library\CMSIS\Include -I..\..\..\..\Library\Device\Nuvoton\NM1120\Include -I..\..\..\..\Library\StdDriver\inc -I.\source -IC:\Keil_v5\ARM\RV31\INC -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\3.20.4\CMSIS\Include -D__MICROLIB --omf_browse=.\obj\main.crf ..\main.c]
                          THUMB

                          AREA ||i.ADC_Command||, CODE, READONLY, ALIGN=2

                  ADC_Command PROC
;;;327    /* Setting PC2 as ADC Command input */	
;;;328     unsigned int ADC_Command(void)
000000  b510              PUSH     {r4,lr}
;;;329     {
;;;330     		/* Configure EADC0: channel 2 (BIN2), software trigger */
;;;331     		EADC_ConfigSampleModule(EADC, EADC_EADC1_2, EADC_SOFTWARE_TRIGGER, NULL);
000002  4c0b              LDR      r4,|L1.48|
000004  2300              MOVS     r3,#0
000006  461a              MOV      r2,r3
000008  210a              MOVS     r1,#0xa
00000a  4620              MOV      r0,r4
00000c  f7fffffe          BL       EADC_ConfigSampleModule
;;;332     		EADC_START_CONV(EADC, EADC_CTL_ADC1SWTRG_Msk);              // software trigger EADC0
000010  6a21              LDR      r1,[r4,#0x20]
000012  2201              MOVS     r2,#1
000014  02d2              LSLS     r2,r2,#11
000016  4311              ORRS     r1,r1,r2
000018  6221              STR      r1,[r4,#0x20]
                  |L1.26|
;;;333     		while (!EADC_GET_INT_FLAG(EADC, EADC_STATUS_ADC1F_Msk));    // wait EADC0 completed by polling
00001a  6b21              LDR      r1,[r4,#0x30]
00001c  05c9              LSLS     r1,r1,#23
00001e  d5fc              BPL      |L1.26|
;;;334     		EADC_CLR_INT_FLAG(EADC, EADC_STATUS_ADC1F_Msk);
000020  20ff              MOVS     r0,#0xff
000022  3001              ADDS     r0,#1
000024  6320              STR      r0,[r4,#0x30]
;;;335     		return((EADC->DAT[0] & EADC_DAT0_ADC1DAT0_Msk) >> EADC_DAT0_ADC1DAT0_Pos);	
000026  6820              LDR      r0,[r4,#0]
000028  0100              LSLS     r0,r0,#4
00002a  0d00              LSRS     r0,r0,#20
;;;336     }	
00002c  bd10              POP      {r4,pc}
;;;337    
                          ENDP

00002e  0000              DCW      0x0000
                  |L1.48|
                          DCD      0x400e0000

                          AREA ||i.ADC_DCBusCurrent||, CODE, READONLY, ALIGN=2

                  ADC_DCBusCurrent PROC
;;;314    /* Setting AIN3 as DCBusCurrent input */	
;;;315    unsigned int ADC_DCBusCurrent(void)
000000  b510              PUSH     {r4,lr}
;;;316    {
;;;317    		/* Configure EADC0: channel 3 (AIN3), software trigger */
;;;318    		EADC_ConfigSampleModule(EADC, EADC_EADC0_3, EADC_SOFTWARE_TRIGGER, NULL);
000002  4c0a              LDR      r4,|L2.44|
000004  2300              MOVS     r3,#0
000006  461a              MOV      r2,r3
000008  2103              MOVS     r1,#3
00000a  4620              MOV      r0,r4
00000c  f7fffffe          BL       EADC_ConfigSampleModule
;;;319    		EADC_START_CONV(EADC, EADC_CTL_ADC0SWTRG_Msk);              // software trigger EADC0
000010  6a21              LDR      r1,[r4,#0x20]
000012  2208              MOVS     r2,#8
000014  4311              ORRS     r1,r1,r2
000016  6221              STR      r1,[r4,#0x20]
                  |L2.24|
;;;320    		while (!EADC_GET_INT_FLAG(EADC, EADC_STATUS_ADC0F_Msk));    // wait EADC0 completed by polling
000018  6b21              LDR      r1,[r4,#0x30]
00001a  07c9              LSLS     r1,r1,#31
00001c  d0fc              BEQ      |L2.24|
;;;321    		EADC_CLR_INT_FLAG(EADC, EADC_STATUS_ADC0F_Msk);
00001e  2001              MOVS     r0,#1
000020  6320              STR      r0,[r4,#0x30]
;;;322    		return((EADC->DAT[0] & EADC_DAT0_ADC0DAT0_Msk) >> EADC_DAT0_ADC0DAT0_Pos);
000022  6820              LDR      r0,[r4,#0]
000024  0500              LSLS     r0,r0,#20
000026  0d00              LSRS     r0,r0,#20
;;;323    }		
000028  bd10              POP      {r4,pc}
;;;324    
                          ENDP

00002a  0000              DCW      0x0000
                  |L2.44|
                          DCD      0x400e0000

                          AREA ||i.ADC_Update||, CODE, READONLY, ALIGN=2

                  ADC_Update PROC
;;;879    /* All ADC converter Update*/
;;;880    void ADC_Update(void)
000000  b510              PUSH     {r4,lr}
;;;881    {
;;;882    //	u16_ADC_Prometer_Temp = ADC_Prometer();  // Prometer sensing
;;;883      #ifdef PWM_DIRECT_INPUT
;;;884      #else	
;;;885    	u16_VSP_Command_Temp = ADC_Command();
000002  f7fffffe          BL       ADC_Command
000006  4904              LDR      r1,|L3.24|
;;;886      #endif
;;;887    	u16_ADC_DCBusCurrent_Temp = ADC_DCBusCurrent();//ADC_DCBusCurrent();	  // DC bus current  
000008  6288              STR      r0,[r1,#0x28]  ; u16_VSP_Command_Temp
00000a  f7fffffe          BL       ADC_DCBusCurrent
00000e  4902              LDR      r1,|L3.24|
000010  3180              ADDS     r1,r1,#0x80
000012  6008              STR      r0,[r1,#0]  ; u16_ADC_DCBusCurrent_Temp
;;;888    }
000014  bd10              POP      {r4,pc}
;;;889    
                          ENDP

000016  0000              DCW      0x0000
                  |L3.24|
                          DCD      ||.data||

                          AREA ||i.CCAP_IRQHandler||, CODE, READONLY, ALIGN=2

                  CCAP_IRQHandler PROC
;;;717    /* CCAP Interrupt */
;;;718    void CCAP_IRQHandler(void)
000000  b510              PUSH     {r4,lr}
;;;719    {	
;;;720     u32_CCAP_Undo_Counter = 0;
000002  491d              LDR      r1,|L4.120|
000004  2000              MOVS     r0,#0
;;;721    	
;;;722    /* When CCAP trigger first time interrupt */	
;;;723     if(u8_CCAP_First_Flag)
000006  6248              STR      r0,[r1,#0x24]  ; u32_CCAP_Undo_Counter
000008  780a              LDRB     r2,[r1,#0]  ; u8_CCAP_First_Flag
;;;724     {	 
;;;725      /* Pulse Width */
;;;726      if(TIMERAC->CCAP[0] >= u32_CCAP_Rising_Old )
00000a  481c              LDR      r0,|L4.124|
00000c  2a00              CMP      r2,#0                 ;723
00000e  d017              BEQ      |L4.64|
000010  6844              LDR      r4,[r0,#4]
000012  694a              LDR      r2,[r1,#0x14]  ; u32_CCAP_Rising_Old
;;;727       u32_CCAP_PulseWidth = TIMERAC->CCAP[0] - u32_CCAP_Rising_Old ;
;;;728      else
;;;729    	 u32_CCAP_PulseWidth = 0xFFFFFF - u32_CCAP_Rising_Old + TIMERAC->CCAP[0];
000014  4b1a              LDR      r3,|L4.128|
000016  4294              CMP      r4,r2                 ;726
000018  d302              BCC      |L4.32|
00001a  6844              LDR      r4,[r0,#4]            ;727
00001c  1aa2              SUBS     r2,r4,r2              ;727
00001e  e002              B        |L4.38|
                  |L4.32|
000020  6844              LDR      r4,[r0,#4]
000022  1a9a              SUBS     r2,r3,r2
000024  1912              ADDS     r2,r2,r4
                  |L4.38|
;;;730    	 	
;;;731      /* High Duty */
;;;732      if(TIMERAC->CCAP[1] >= TIMERAC->CCAP[0])
000026  620a              STR      r2,[r1,#0x20]  ; u32_CCAP_PulseWidth
000028  6882              LDR      r2,[r0,#8]
00002a  6844              LDR      r4,[r0,#4]
00002c  42a2              CMP      r2,r4
;;;733       u32_CCAP_HighDuty = TIMERAC->CCAP[1] - TIMERAC->CCAP[0];
;;;734      else
;;;735    	 u32_CCAP_HighDuty = 0xFFFFFF + TIMERAC->CCAP[1] - TIMERAC->CCAP[0];
00002e  6882              LDR      r2,[r0,#8]
000030  d302              BCC      |L4.56|
000032  6843              LDR      r3,[r0,#4]            ;733
000034  1ad2              SUBS     r2,r2,r3              ;733
000036  e002              B        |L4.62|
                  |L4.56|
000038  6844              LDR      r4,[r0,#4]
00003a  1b12              SUBS     r2,r2,r4
00003c  18d2              ADDS     r2,r2,r3
                  |L4.62|
00003e  61ca              STR      r2,[r1,#0x1c]         ;733  ; u32_CCAP_HighDuty
                  |L4.64|
;;;736     }
;;;737     
;;;738    /* Record previous Rising and Falling value */ 
;;;739     u32_CCAP_Rising_Old  = TIMERAC->CCAP[0];
000040  6842              LDR      r2,[r0,#4]
;;;740     u32_CCAP_Falling_Old = TIMERAC->CCAP[1];
000042  614a              STR      r2,[r1,#0x14]  ; u32_CCAP_Rising_Old
000044  6882              LDR      r2,[r0,#8]
;;;741     
;;;742     u8_CCAP_First_Flag = 1;
000046  618a              STR      r2,[r1,#0x18]  ; u32_CCAP_Falling_Old
000048  2201              MOVS     r2,#1
00004a  700a              STRB     r2,[r1,#0]
;;;743     
;;;744    /* Restart CCAP again */ 
;;;745     /* Enable CCAP Interrupt as 1-rising and 1-falling mode*/	
;;;746     TIMERAC->CCAPCTL &= ~TIMER_CCAPCTL_CCAPIEN_Msk;
00004c  6801              LDR      r1,[r0,#0]
00004e  2303              MOVS     r3,#3
000050  041b              LSLS     r3,r3,#16
000052  4399              BICS     r1,r1,r3
000054  6001              STR      r1,[r0,#0]
;;;747     TIMERAC->CCAPCTL |= 0x01<<TIMER_CCAPCTL_CCAPIEN_Pos;	
000056  6801              LDR      r1,[r0,#0]
000058  0413              LSLS     r3,r2,#16
00005a  4319              ORRS     r1,r1,r3
00005c  6001              STR      r1,[r0,#0]
;;;748     /* Setting CCAP enable */
;;;749     TIMERAC->CCAPCTL &= ~TIMER_CCAPCTL_CCAPEN_Msk;	
00005e  6801              LDR      r1,[r0,#0]
000060  4391              BICS     r1,r1,r2
000062  6001              STR      r1,[r0,#0]
;;;750     TIMERAC->CCAPCTL |= TIMER_CCAPCTL_CCAPEN_Msk;	 
000064  6801              LDR      r1,[r0,#0]
000066  4311              ORRS     r1,r1,r2
000068  6001              STR      r1,[r0,#0]
;;;751     /* Clear all CCAP Flag  */
;;;752     TIMERAC->CCAPCTL |=(TIMER_CCAPCTL_CAPR1F_Msk | TIMER_CCAPCTL_CAPF1F_Msk | TIMER_CCAPCTL_CAPR2F_Msk | TIMER_CCAPCTL_CAPF2F_Msk) ;	
00006a  6801              LDR      r1,[r0,#0]
00006c  220f              MOVS     r2,#0xf
00006e  0212              LSLS     r2,r2,#8
000070  4311              ORRS     r1,r1,r2
000072  6001              STR      r1,[r0,#0]
;;;753    }
000074  bd10              POP      {r4,pc}
;;;754    
                          ENDP

000076  0000              DCW      0x0000
                  |L4.120|
                          DCD      ||.data||
                  |L4.124|
                          DCD      0x40010040
                  |L4.128|
                          DCD      0x00ffffff

                          AREA ||i.CCAP_Init||, CODE, READONLY, ALIGN=2

                  CCAP_Init PROC
;;;445    /* CCAP Initialize Function */
;;;446    void CCAP_Init(void)
000000  b510              PUSH     {r4,lr}
;;;447    {
;;;448    		 u8_CCAP_First_Flag = 0;
000002  4913              LDR      r1,|L5.80|
000004  2000              MOVS     r0,#0
000006  7008              STRB     r0,[r1,#0]
;;;449    			
;;;450    		 /* CCAP Channel setting PC.2	*/
;;;451    		 TIMERAC->CCAPCTL &= ~TIMER_CCAPCTL_CAPCHSEL_Msk;
000008  4812              LDR      r0,|L5.84|
00000a  6802              LDR      r2,[r0,#0]
00000c  2110              MOVS     r1,#0x10
00000e  438a              BICS     r2,r2,r1
000010  6002              STR      r2,[r0,#0]
;;;452    		 TIMERAC->CCAPCTL |= 0x1<<TIMER_CCAPCTL_CAPCHSEL_Pos;
000012  6802              LDR      r2,[r0,#0]
000014  430a              ORRS     r2,r2,r1
000016  6002              STR      r2,[r0,#0]
;;;453    
;;;454    		 /* Setting CCAP Counter Base as Timer0 */ 	
;;;455    		 TIMERAC->CCAPCTL &= ~TIMER_CCAPCTL_CNTSEL_Msk;	
000018  6801              LDR      r1,[r0,#0]
00001a  220c              MOVS     r2,#0xc
00001c  4391              BICS     r1,r1,r2
00001e  6001              STR      r1,[r0,#0]
;;;456    				
;;;457    		 /* Enable CCAP Interrupt as 1-rising and 1-falling mode*/	
;;;458    		 TIMERAC->CCAPCTL &= ~TIMER_CCAPCTL_CCAPIEN_Msk;
000020  6801              LDR      r1,[r0,#0]
000022  0392              LSLS     r2,r2,#14
000024  4391              BICS     r1,r1,r2
000026  6001              STR      r1,[r0,#0]
;;;459    		 TIMERAC->CCAPCTL |= 0x01<<TIMER_CCAPCTL_CCAPIEN_Pos;	
000028  6802              LDR      r2,[r0,#0]
00002a  2101              MOVS     r1,#1
00002c  0409              LSLS     r1,r1,#16
00002e  430a              ORRS     r2,r2,r1
000030  6002              STR      r2,[r0,#0]
;;;460    			
;;;461    		 /* Setting CCAP enable */
;;;462    		 TIMERAC->CCAPCTL &= ~TIMER_CCAPCTL_CCAPEN_Msk;	
000032  6802              LDR      r2,[r0,#0]
000034  0852              LSRS     r2,r2,#1
000036  0052              LSLS     r2,r2,#1
000038  6002              STR      r2,[r0,#0]
;;;463    		 TIMERAC->CCAPCTL |= TIMER_CCAPCTL_CCAPEN_Msk;	
00003a  6802              LDR      r2,[r0,#0]
00003c  2301              MOVS     r3,#1
00003e  431a              ORRS     r2,r2,r3
000040  6002              STR      r2,[r0,#0]
000042  4805              LDR      r0,|L5.88|
000044  6001              STR      r1,[r0,#0]
;;;464    
;;;465    		 /* Enable_Interrutp */	
;;;466    		 NVIC_EnableIRQ(CCAP_IRQn);
;;;467    		 NVIC_SetPriority(CCAP_IRQn,0);	
000046  2100              MOVS     r1,#0
000048  2010              MOVS     r0,#0x10
00004a  f7fffffe          BL       NVIC_SetPriority
;;;468    }
00004e  bd10              POP      {r4,pc}
;;;469    
                          ENDP

                  |L5.80|
                          DCD      ||.data||
                  |L5.84|
                          DCD      0x40010040
                  |L5.88|
                          DCD      0xe000e100

                          AREA ||i.EADC_Init||, CODE, READONLY, ALIGN=2

                  EADC_Init PROC
;;;273    /* EADC Initialize */
;;;274    void EADC_Init(void)
000000  b570              PUSH     {r4-r6,lr}
;;;275    {
;;;276        // Set EADC clock source to HIRC
;;;277        CLK_SetModuleClock(EADC_MODULE, CLK_EADC_SRC_HIRC, CLK_CLKDIV_EADC(4));
000002  2203              MOVS     r2,#3
000004  0412              LSLS     r2,r2,#16
000006  2130              MOVS     r1,#0x30
000008  4820              LDR      r0,|L6.140|
00000a  f7fffffe          BL       CLK_SetModuleClock
;;;278    
;;;279        // Reset IP
;;;280        SYS_ResetModule(EADC_RST);
00000e  2001              MOVS     r0,#1
000010  0700              LSLS     r0,r0,#28
000012  f7fffffe          BL       SYS_ResetModule
;;;281    
;;;282        /* Setting PC0 as AIN3 */
;;;283        SYS->GPC_MFP = (SYS->GPC_MFP & (~SYS_GPC_MFP_PC0MFP_Msk));
000016  2405              MOVS     r4,#5
000018  0724              LSLS     r4,r4,#28
00001a  6ba0              LDR      r0,[r4,#0x38]
00001c  0900              LSRS     r0,r0,#4
00001e  0100              LSLS     r0,r0,#4
000020  63a0              STR      r0,[r4,#0x38]
;;;284        SYS->GPC_MFP|= SYS_GPC_MFP_PC0_ADC0_CH3;
000022  6ba0              LDR      r0,[r4,#0x38]
000024  2102              MOVS     r1,#2
000026  4308              ORRS     r0,r0,r1
000028  63a0              STR      r0,[r4,#0x38]
;;;285        GPIO_SetMode(PC, BIT0, GPIO_MODE_INPUT);
00002a  4d19              LDR      r5,|L6.144|
00002c  2200              MOVS     r2,#0
00002e  2101              MOVS     r1,#1
000030  4628              MOV      r0,r5
000032  f7fffffe          BL       GPIO_SetMode
;;;286        GPIO_DISABLE_DIGITAL_PATH(PC, BIT0);
000036  6868              LDR      r0,[r5,#4]
000038  2101              MOVS     r1,#1
00003a  0409              LSLS     r1,r1,#16
00003c  4308              ORRS     r0,r0,r1
00003e  6068              STR      r0,[r5,#4]
;;;287    
;;;288    	  #ifdef PWM_DIRECT_INPUT 
;;;289    	  #else
;;;290    	  /* Setting PC2 as BIN2 */
;;;291         SYS->GPC_MFP = (SYS->GPC_MFP & (~SYS_GPC_MFP_PC2MFP_Msk));
000040  6ba0              LDR      r0,[r4,#0x38]
000042  210f              MOVS     r1,#0xf
000044  0209              LSLS     r1,r1,#8
000046  4388              BICS     r0,r0,r1
000048  63a0              STR      r0,[r4,#0x38]
;;;292         SYS->GPC_MFP|= SYS_GPC_MFP_PC2_ADC1_CH2;
00004a  6ba0              LDR      r0,[r4,#0x38]
00004c  2101              MOVS     r1,#1
00004e  0249              LSLS     r1,r1,#9
000050  4308              ORRS     r0,r0,r1
000052  63a0              STR      r0,[r4,#0x38]
;;;293         GPIO_SetMode(PC, BIT2, GPIO_MODE_INPUT);
000054  2200              MOVS     r2,#0
000056  2104              MOVS     r1,#4
000058  4628              MOV      r0,r5
00005a  f7fffffe          BL       GPIO_SetMode
;;;294         GPIO_DISABLE_DIGITAL_PATH(PC, BIT2);
00005e  6868              LDR      r0,[r5,#4]
000060  2101              MOVS     r1,#1
000062  0489              LSLS     r1,r1,#18
000064  4308              ORRS     r0,r0,r1
000066  6068              STR      r0,[r5,#4]
;;;295    	  /* Setting PD2 as BIN1 */
;;;296    //     SYS->GPD_MFP = (SYS->GPD_MFP & (~SYS_GPD_MFP_PD2MFP_Msk));
;;;297    //     SYS->GPD_MFP|= SYS_GPD_MFP_PD2_ADC1_CH1;
;;;298    //     GPIO_SetMode(PD, BIT2, GPIO_MODE_INPUT);
;;;299    //     GPIO_DISABLE_DIGITAL_PATH(PD, BIT2);	
;;;300    		#endif
;;;301        // Enable EADC
;;;302        EADC_Open(EADC, NULL);
000068  4c0a              LDR      r4,|L6.148|
00006a  2100              MOVS     r1,#0
00006c  4620              MOV      r0,r4
00006e  f7fffffe          BL       EADC_Open
;;;303    
;;;304        // Configure EADC conversion mode to Independent Simple Mode
;;;305        EADC_SET_INDEPENDENT_SIMPLE_MODE(EADC);
000072  6a20              LDR      r0,[r4,#0x20]
000074  21c0              MOVS     r1,#0xc0
000076  4388              BICS     r0,r0,r1
000078  6220              STR      r0,[r4,#0x20]
;;;306    
;;;307        // Configure EADC sample time to 6 EADC clocks
;;;308        EADC_SetExtendSampleTime(EADC, NULL, 5);
00007a  2205              MOVS     r2,#5
00007c  2100              MOVS     r1,#0
00007e  4620              MOV      r0,r4
000080  f7fffffe          BL       EADC_SetExtendSampleTime
;;;309    
;;;310        // Begin to do EADC conversion.
;;;311        EADC_CLR_INT_FLAG(EADC, EADC_STATUS_ADC0F_Msk|EADC_STATUS_ADC1F_Msk);
000084  20ff              MOVS     r0,#0xff
000086  3002              ADDS     r0,#2
000088  6320              STR      r0,[r4,#0x30]
;;;312    }
00008a  bd70              POP      {r4-r6,pc}
;;;313    
                          ENDP

                  |L6.140|
                          DCD      0x4888221c
                  |L6.144|
                          DCD      0x50004080
                  |L6.148|
                          DCD      0x400e0000

                          AREA ||i.ECAP_IRQHandler||, CODE, READONLY, ALIGN=2

                  ECAP_IRQHandler PROC
;;;575    /* ECAP interrupt */
;;;576    void ECAP_IRQHandler(void)
000000  b510              PUSH     {r4,lr}
;;;577    {	
;;;578    	if(ECAP->STS & BIT0)
000002  491c              LDR      r1,|L7.116|
000004  69c8              LDR      r0,[r1,#0x1c]
;;;579    	{
;;;580       //EPWM->PHCHG = 0x703C00;            //motor stop				
;;;581       u32_ECAP_HOLD = ECAP_GET_CNT_HOLD_VALUE(ECAP,ECAP_IC0);			
;;;582    	 ECAP->STS = ECAP_STS_CAPTF0_Msk;
000006  2201              MOVS     r2,#1
000008  07c3              LSLS     r3,r0,#31             ;578
00000a  481b              LDR      r0,|L7.120|
00000c  2b00              CMP      r3,#0                 ;578
00000e  d004              BEQ      |L7.26|
000010  684b              LDR      r3,[r1,#4]            ;581
000012  021b              LSLS     r3,r3,#8              ;581
000014  0a1b              LSRS     r3,r3,#8              ;581
000016  6683              STR      r3,[r0,#0x68]  ; u32_ECAP_HOLD
000018  61ca              STR      r2,[r1,#0x1c]
                  |L7.26|
;;;583      }
;;;584      if(ECAP->STS & BIT1)
00001a  69cb              LDR      r3,[r1,#0x1c]
00001c  079b              LSLS     r3,r3,#30
00001e  d505              BPL      |L7.44|
;;;585    	{ 
;;;586       //EPWM->PHCHG = 0x703300;            //motor stop			 				 
;;;587       u32_ECAP_HOLD = ECAP_GET_CNT_HOLD_VALUE(ECAP,ECAP_IC1);			
000020  688b              LDR      r3,[r1,#8]
000022  021b              LSLS     r3,r3,#8
000024  0a1b              LSRS     r3,r3,#8
;;;588    	 ECAP->STS = ECAP_STS_CAPTF1_Msk;
000026  6683              STR      r3,[r0,#0x68]  ; u32_ECAP_HOLD
000028  2302              MOVS     r3,#2
00002a  61cb              STR      r3,[r1,#0x1c]
                  |L7.44|
;;;589      }	
;;;590      if(ECAP->STS & BIT2)
00002c  69cb              LDR      r3,[r1,#0x1c]
00002e  075b              LSLS     r3,r3,#29
000030  d505              BPL      |L7.62|
;;;591    	{
;;;592       //EPWM->PHCHG = 0x700F00;            //motor stop			
;;;593       u32_ECAP_HOLD = ECAP_GET_CNT_HOLD_VALUE(ECAP,ECAP_IC2);			
000032  68cb              LDR      r3,[r1,#0xc]
000034  021b              LSLS     r3,r3,#8
000036  0a1b              LSRS     r3,r3,#8
;;;594    	 ECAP->STS = ECAP_STS_CAPTF2_Msk;
000038  6683              STR      r3,[r0,#0x68]  ; u32_ECAP_HOLD
00003a  2304              MOVS     r3,#4
00003c  61cb              STR      r3,[r1,#0x1c]
                  |L7.62|
;;;595      }
;;;596    	
;;;597    	if(ECAP->STS & BIT4)
00003e  69cb              LDR      r3,[r1,#0x1c]
000040  06dc              LSLS     r4,r3,#27
000042  2300              MOVS     r3,#0
000044  2c00              CMP      r4,#0
000046  da05              BGE      |L7.84|
;;;598      {
;;;599    	 EPWM->PHCHG = 0x703F00;            //motor stop	
000048  4c0d              LDR      r4,|L7.128|
00004a  4a0c              LDR      r2,|L7.124|
00004c  63a2              STR      r2,[r4,#0x38]
;;;600       ECAP->STS = ECAP_STS_CAPCMPF_Msk;
00004e  2210              MOVS     r2,#0x10
000050  61ca              STR      r2,[r1,#0x1c]
000052  e00c              B        |L7.110|
                  |L7.84|
;;;601      }
;;;602    	else
;;;603    	{
;;;604    		u32_Speed_Period = u32_ECAP_HOLD>>5;	
000054  6e81              LDR      r1,[r0,#0x68]  ; u32_ECAP_HOLD
;;;605    		/* Reset Lock Counter */
;;;606    		u32_Lock_Detection_Counter = 0;
;;;607    		/*Hall_flag enable */
;;;608    		u8_SpeedComputation_Flag = 1;			
000056  6583              STR      r3,[r0,#0x58]  ; u32_Lock_Detection_Counter
000058  0949              LSRS     r1,r1,#5              ;604
00005a  66c1              STR      r1,[r0,#0x6c]  ; u32_Speed_Period
00005c  72c2              STRB     r2,[r0,#0xb]
;;;609    		/* Hall startup and stable switching */
;;;610    		if(u8_Hall_SW_Counter<Hall_SW_TERMINAL)
00005e  7981              LDRB     r1,[r0,#6]  ; u8_Hall_SW_Counter
000060  2906              CMP      r1,#6
000062  d203              BCS      |L7.108|
000064  1c49              ADDS     r1,r1,#1
;;;611    		{
;;;612    		 u8_Hall_SW_Counter++;
000066  7181              STRB     r1,[r0,#6]
;;;613    		 u8_Hall_SW_Flag = 0;		
000068  7143              STRB     r3,[r0,#5]
00006a  e000              B        |L7.110|
                  |L7.108|
;;;614    		}	
;;;615    		else
;;;616    		{
;;;617    		 u8_Hall_SW_Flag =1;
00006c  7142              STRB     r2,[r0,#5]
                  |L7.110|
;;;618    		}	
;;;619    		/* SWICH HALL STATE */
;;;620      }
;;;621      u8_ClockWise = 0;//PD3;
00006e  7283              STRB     r3,[r0,#0xa]
;;;622    //	Get_Hall_State();
;;;623    }
000070  bd10              POP      {r4,pc}
;;;624    
                          ENDP

000072  0000              DCW      0x0000
                  |L7.116|
                          DCD      0x401b0000
                  |L7.120|
                          DCD      ||.data||
                  |L7.124|
                          DCD      0x00703f00
                  |L7.128|
                          DCD      0x40040040

                          AREA ||i.ECAP_Init||, CODE, READONLY, ALIGN=2

                  ECAP_Init PROC
;;;232    /* ECAP Initialize */
;;;233    void ECAP_Init(void)
000000  b570              PUSH     {r4-r6,lr}
;;;234    {	
;;;235    		/* Set PB0~PB2 as ECAP0~ECAP2 */
;;;236    		SYS->GPB_MFP = (SYS->GPB_MFP & (~SYS_GPB_MFP_PB0MFP_Msk));
000002  2005              MOVS     r0,#5
000004  0700              LSLS     r0,r0,#28
000006  6b41              LDR      r1,[r0,#0x34]
000008  0909              LSRS     r1,r1,#4
00000a  0109              LSLS     r1,r1,#4
00000c  6341              STR      r1,[r0,#0x34]
;;;237    		SYS->GPB_MFP |= SYS_GPB_MFP_PB0_ECAP0;
00000e  6b41              LDR      r1,[r0,#0x34]
000010  2407              MOVS     r4,#7
000012  4321              ORRS     r1,r1,r4
000014  6341              STR      r1,[r0,#0x34]
;;;238    		SYS->GPB_MFP = (SYS->GPB_MFP & (~SYS_GPB_MFP_PB1MFP_Msk));
000016  6b41              LDR      r1,[r0,#0x34]
000018  22f0              MOVS     r2,#0xf0
00001a  4391              BICS     r1,r1,r2
00001c  6341              STR      r1,[r0,#0x34]
;;;239    		SYS->GPB_MFP |= SYS_GPB_MFP_PB1_ECAP1;		
00001e  6b41              LDR      r1,[r0,#0x34]
000020  2270              MOVS     r2,#0x70
000022  4311              ORRS     r1,r1,r2
000024  6341              STR      r1,[r0,#0x34]
;;;240    		SYS->GPB_MFP = (SYS->GPB_MFP & (~SYS_GPB_MFP_PB2MFP_Msk));
000026  6b41              LDR      r1,[r0,#0x34]
000028  220f              MOVS     r2,#0xf
00002a  0212              LSLS     r2,r2,#8
00002c  4391              BICS     r1,r1,r2
00002e  6341              STR      r1,[r0,#0x34]
;;;241    		SYS->GPB_MFP |= SYS_GPB_MFP_PB2_ECAP2;
000030  6b41              LDR      r1,[r0,#0x34]
000032  0222              LSLS     r2,r4,#8
000034  4311              ORRS     r1,r1,r2
000036  6341              STR      r1,[r0,#0x34]
;;;242    		GPIO_SetMode(PB, BIT0, GPIO_MODE_INPUT);
000038  4d3c              LDR      r5,|L8.300|
00003a  2200              MOVS     r2,#0
00003c  2101              MOVS     r1,#1
00003e  4628              MOV      r0,r5
000040  f7fffffe          BL       GPIO_SetMode
;;;243    		GPIO_SetMode(PB, BIT1, GPIO_MODE_INPUT);	
000044  2200              MOVS     r2,#0
000046  2102              MOVS     r1,#2
000048  4628              MOV      r0,r5
00004a  f7fffffe          BL       GPIO_SetMode
;;;244    		GPIO_SetMode(PB, BIT2, GPIO_MODE_INPUT);
00004e  2200              MOVS     r2,#0
000050  2104              MOVS     r1,#4
000052  4628              MOV      r0,r5
000054  f7fffffe          BL       GPIO_SetMode
;;;245        /*Setting PB0 ~ PB2 as Smith Trigger */
;;;246    		PB->SMTEN |= (BIT0 | BIT1 | BIT2);  
000058  6a69              LDR      r1,[r5,#0x24]
00005a  4321              ORRS     r1,r1,r4
00005c  6269              STR      r1,[r5,#0x24]
;;;247        /* Setting ECAP Function */
;;;248        ECAP_NOISE_FILTER_ENABLE(ECAP,ECAP_NOISE_FILTER_CLKDIV_4);	
00005e  4834              LDR      r0,|L8.304|
000060  6941              LDR      r1,[r0,#0x14]
000062  220b              MOVS     r2,#0xb
000064  4391              BICS     r1,r1,r2
000066  1c89              ADDS     r1,r1,#2
000068  6141              STR      r1,[r0,#0x14]
;;;249        ECAP_ENABLE_INPUT_CHANNEL(ECAP,ECAP_CTR0_IC0EN_Msk);
00006a  6941              LDR      r1,[r0,#0x14]
00006c  2210              MOVS     r2,#0x10
00006e  4311              ORRS     r1,r1,r2
000070  6141              STR      r1,[r0,#0x14]
;;;250        ECAP_ENABLE_INPUT_CHANNEL(ECAP,ECAP_CTR0_IC1EN_Msk);
000072  6941              LDR      r1,[r0,#0x14]
000074  2220              MOVS     r2,#0x20
000076  4311              ORRS     r1,r1,r2
000078  6141              STR      r1,[r0,#0x14]
;;;251        ECAP_ENABLE_INPUT_CHANNEL(ECAP,ECAP_CTR0_IC2EN_Msk);
00007a  6941              LDR      r1,[r0,#0x14]
00007c  2240              MOVS     r2,#0x40
00007e  4311              ORRS     r1,r1,r2
000080  6141              STR      r1,[r0,#0x14]
;;;252        ECAP_SEL_INPUT_SRC(ECAP,ECAP_IC0,ECAP_CAP_INPUT_SRC_ECAPX);
000082  6941              LDR      r1,[r0,#0x14]
000084  2203              MOVS     r2,#3
000086  0212              LSLS     r2,r2,#8
000088  4391              BICS     r1,r1,r2
00008a  6141              STR      r1,[r0,#0x14]
;;;253        ECAP_SEL_INPUT_SRC(ECAP,ECAP_IC1,ECAP_CAP_INPUT_SRC_ECAPX);
00008c  6941              LDR      r1,[r0,#0x14]
00008e  0092              LSLS     r2,r2,#2
000090  4391              BICS     r1,r1,r2
000092  6141              STR      r1,[r0,#0x14]
;;;254        ECAP_SEL_INPUT_SRC(ECAP,ECAP_IC2,ECAP_CAP_INPUT_SRC_ECAPX);
000094  6941              LDR      r1,[r0,#0x14]
000096  0092              LSLS     r2,r2,#2
000098  4391              BICS     r1,r1,r2
00009a  6141              STR      r1,[r0,#0x14]
;;;255        ECAP_SEL_CAPTURE_EDGE(ECAP,ECAP_IC0,ECAP_RISING_FALLING_EDGE);
00009c  6981              LDR      r1,[r0,#0x18]
00009e  0889              LSRS     r1,r1,#2
0000a0  0089              LSLS     r1,r1,#2
0000a2  1c89              ADDS     r1,r1,#2
0000a4  6181              STR      r1,[r0,#0x18]
;;;256        ECAP_SEL_CAPTURE_EDGE(ECAP,ECAP_IC1,ECAP_RISING_FALLING_EDGE);
0000a6  6981              LDR      r1,[r0,#0x18]
0000a8  220c              MOVS     r2,#0xc
0000aa  4391              BICS     r1,r1,r2
0000ac  3108              ADDS     r1,r1,#8
0000ae  6181              STR      r1,[r0,#0x18]
;;;257        ECAP_SEL_CAPTURE_EDGE(ECAP,ECAP_IC2,ECAP_RISING_FALLING_EDGE);		
0000b0  6981              LDR      r1,[r0,#0x18]
0000b2  2230              MOVS     r2,#0x30
0000b4  4391              BICS     r1,r1,r2
0000b6  3120              ADDS     r1,r1,#0x20
0000b8  6181              STR      r1,[r0,#0x18]
;;;258        ECAP_ENABLE_INT(ECAP,ECAP_CTR0_CAPTF0IEN_Msk);
0000ba  6941              LDR      r1,[r0,#0x14]
0000bc  2201              MOVS     r2,#1
0000be  0412              LSLS     r2,r2,#16
0000c0  4311              ORRS     r1,r1,r2
0000c2  6141              STR      r1,[r0,#0x14]
;;;259        ECAP_ENABLE_INT(ECAP,ECAP_CTR0_CAPTF1IEN_Msk);
0000c4  6941              LDR      r1,[r0,#0x14]
0000c6  0052              LSLS     r2,r2,#1
0000c8  4311              ORRS     r1,r1,r2
0000ca  6141              STR      r1,[r0,#0x14]
;;;260        ECAP_ENABLE_INT(ECAP,ECAP_CTR0_CAPTF2IEN_Msk);
0000cc  6941              LDR      r1,[r0,#0x14]
0000ce  0052              LSLS     r2,r2,#1
0000d0  4311              ORRS     r1,r1,r2
0000d2  6141              STR      r1,[r0,#0x14]
;;;261        ECAP_ENABLE_INT(ECAP,ECAP_CTR0_CAPCMPIEN_Msk);
0000d4  6941              LDR      r1,[r0,#0x14]
0000d6  00d2              LSLS     r2,r2,#3
0000d8  4311              ORRS     r1,r1,r2
0000da  6141              STR      r1,[r0,#0x14]
;;;262        ECAP_SEL_TIMER_CLK_SRC(ECAP,ECAP_CAPTURE_TIMER_CLK_SRC_CAP_CLK);
0000dc  6981              LDR      r1,[r0,#0x18]
0000de  2203              MOVS     r2,#3
0000e0  0412              LSLS     r2,r2,#16
0000e2  4391              BICS     r1,r1,r2
0000e4  6181              STR      r1,[r0,#0x18]
;;;263        ECAP_SEL_TIMER_CLK_DIV(ECAP,ECAP_CAPTURE_TIMER_CLKDIV_16);
0000e6  6981              LDR      r1,[r0,#0x18]
0000e8  0322              LSLS     r2,r4,#12
0000ea  4391              BICS     r1,r1,r2
0000ec  2201              MOVS     r2,#1
0000ee  0352              LSLS     r2,r2,#13
0000f0  1889              ADDS     r1,r1,r2
0000f2  6181              STR      r1,[r0,#0x18]
;;;264        ECAP_SET_CNT_CLEAR_EVENT(ECAP,ECAP_CNT_CLR_BY_CAMCMPF);
0000f4  6941              LDR      r1,[r0,#0x14]
0000f6  2203              MOVS     r2,#3
0000f8  0652              LSLS     r2,r2,#25
0000fa  4311              ORRS     r1,r1,r2
0000fc  6141              STR      r1,[r0,#0x14]
;;;265        ECAP_SET_CNT_CMP(ECAP,0x3FFFFF);		
0000fe  490d              LDR      r1,|L8.308|
000100  6101              STR      r1,[r0,#0x10]
;;;266        ECAP_ENABLE_CMP(ECAP);		
000102  6941              LDR      r1,[r0,#0x14]
000104  05aa              LSLS     r2,r5,#22
000106  4311              ORRS     r1,r1,r2
000108  6141              STR      r1,[r0,#0x14]
;;;267    		ECAP_ENABLE_CNT(ECAP);		
00010a  6941              LDR      r1,[r0,#0x14]
00010c  0052              LSLS     r2,r2,#1
00010e  4311              ORRS     r1,r1,r2
000110  6141              STR      r1,[r0,#0x14]
;;;268    		ECAP_CNT_START(ECAP);
000112  6941              LDR      r1,[r0,#0x14]
000114  1152              ASRS     r2,r2,#5
000116  4311              ORRS     r1,r1,r2
000118  6141              STR      r1,[r0,#0x14]
00011a  4907              LDR      r1,|L8.312|
00011c  1250              ASRS     r0,r2,#9
00011e  6008              STR      r0,[r1,#0]
;;;269    		NVIC_EnableIRQ(ECAP_IRQn);
;;;270    		NVIC_SetPriority(ECAP_IRQn,1);	
000120  2101              MOVS     r1,#1
000122  200f              MOVS     r0,#0xf
000124  f7fffffe          BL       NVIC_SetPriority
;;;271    }
000128  bd70              POP      {r4-r6,pc}
;;;272    
                          ENDP

00012a  0000              DCW      0x0000
                  |L8.300|
                          DCD      0x50004040
                  |L8.304|
                          DCD      0x401b0000
                  |L8.308|
                          DCD      0x003fffff
                  |L8.312|
                          DCD      0xe000e100

                          AREA ||i.EPWM_IRQHandler||, CODE, READONLY, ALIGN=2

                  EPWM_IRQHandler PROC
;;;644    /* EPWM Interrupt */
;;;645    void EPWM_IRQHandler(void)
000000  b5f8              PUSH     {r3-r7,lr}
;;;646    {
;;;647    	ADC_Update();
000002  f7fffffe          BL       ADC_Update
;;;648    	
;;;649    	/* Speed Computation */
;;;650    	if(u8_SpeedComputation_Flag)
000006  4c2f              LDR      r4,|L9.196|
000008  2500              MOVS     r5,#0
00000a  7ae0              LDRB     r0,[r4,#0xb]  ; u8_SpeedComputation_Flag
00000c  2800              CMP      r0,#0
00000e  d017              BEQ      |L9.64|
;;;651    	{				
;;;652    //		FLASH_LED = ~FLASH_LED;
;;;653    		// Hall_flag enable
;;;654    		u8_SpeedComputation_Flag = 0;						
000010  72e5              STRB     r5,[r4,#0xb]
;;;655    		
;;;656        /* Computing Real Mech SPEED */		
;;;657    		if(u32_Speed_Period>=32767) u32_Speed_Period = 32767;
000012  482d              LDR      r0,|L9.200|
000014  6ee1              LDR      r1,[r4,#0x6c]  ; u32_Speed_Period
000016  4281              CMP      r1,r0
000018  d300              BCC      |L9.28|
00001a  66e0              STR      r0,[r4,#0x6c]  ; u32_Speed_Period
                  |L9.28|
;;;658    		MY_HDIV_DIVIDEND = (ESPEED*15625) + u32_Angle_remaind2;
00001c  492b              LDR      r1,|L9.204|
00001e  6fe0              LDR      r0,[r4,#0x7c]  ; u32_Angle_remaind2
000020  1840              ADDS     r0,r0,r1
000022  492b              LDR      r1,|L9.208|
000024  6008              STR      r0,[r1,#0]
;;;659    		MY_HDIV_DIVISOR  = u32_Speed_Period; 
000026  6ee0              LDR      r0,[r4,#0x6c]  ; u32_Speed_Period
000028  6048              STR      r0,[r1,#4]
;;;660    		u32_Mechanical_Spd = MY_HDIV_QUOTIENT;					
00002a  6888              LDR      r0,[r1,#8]
;;;661    		u32_Angle_remaind2 = MY_HDIV_REM;		
00002c  6760              STR      r0,[r4,#0x74]  ; u32_Mechanical_Spd
00002e  68c9              LDR      r1,[r1,#0xc]
;;;662    		u32_Mechanical_Spd_Avg  = (u32_Mechanical_Spd_Avg*3 + u32_Mechanical_Spd)>>2;	
000030  67e1              STR      r1,[r4,#0x7c]  ; u32_Angle_remaind2
000032  6fa1              LDR      r1,[r4,#0x78]  ; u32_Mechanical_Spd_Avg
000034  004a              LSLS     r2,r1,#1
000036  1889              ADDS     r1,r1,r2
000038  1808              ADDS     r0,r1,r0
00003a  0880              LSRS     r0,r0,#2
;;;663        u16_SpeedCommand = u32_Mechanical_Spd_Avg;		
00003c  67a0              STR      r0,[r4,#0x78]  ; u32_Mechanical_Spd_Avg
00003e  6420              STR      r0,[r4,#0x40]  ; u16_SpeedCommand
                  |L9.64|
;;;664    	}	
;;;665    	
;;;666    //	if(u16_SpeedCommand>=1800) FLASH_LED = 0;
;;;667    //	else FLASH_LED = 1;
;;;668    	
;;;669    	/* VSP undo counter */
;;;670    	#ifdef PWM_DIRECT_INPUT
;;;671    	if(u32_CCAP_Undo_Counter<=NO_PWM_INPUT_COUNT)
;;;672    	u32_CCAP_Undo_Counter++;
;;;673    	#else
;;;674      #endif 	
;;;675    	
;;;676    	u16_Duty1 = u16_DutyCommand;
000040  6b60              LDR      r0,[r4,#0x34]  ; u16_DutyCommand
;;;677    	if(u16_Duty1>=4000) u16_Duty1 = 4000;
000042  217d              MOVS     r1,#0x7d
000044  0149              LSLS     r1,r1,#5
000046  6120              STR      r0,[r4,#0x10]  ; u16_Duty1
000048  4288              CMP      r0,r1
00004a  d300              BCC      |L9.78|
00004c  6121              STR      r1,[r4,#0x10]  ; u16_Duty1
                  |L9.78|
;;;678    	u16_Duty0 = 0;
;;;679    
;;;680    	if(u8_StopMotor_Flag)
00004e  60e5              STR      r5,[r4,#0xc]  ; u16_Duty0
000050  7860              LDRB     r0,[r4,#1]  ; u8_StopMotor_Flag
;;;681    	{	
;;;682    	 EPWM_ConfigOutputChannel1(EPWM,0,0);
;;;683    	 EPWM_ConfigOutputChannel1(EPWM,1,0);		 
;;;684    	 Motor_Stop();	
;;;685       FLASH_LED = 0;		
000052  4f20              LDR      r7,|L9.212|
000054  4e20              LDR      r6,|L9.216|
000056  2800              CMP      r0,#0                 ;680
000058  d00f              BEQ      |L9.122|
00005a  2200              MOVS     r2,#0                 ;682
00005c  4611              MOV      r1,r2                 ;682
00005e  4630              MOV      r0,r6                 ;682
000060  f7fffffe          BL       EPWM_ConfigOutputChannel1
000064  2200              MOVS     r2,#0                 ;683
000066  2101              MOVS     r1,#1                 ;683
000068  4630              MOV      r0,r6                 ;683
00006a  f7fffffe          BL       EPWM_ConfigOutputChannel1
00006e  491a              LDR      r1,|L9.216|
000070  481a              LDR      r0,|L9.220|
000072  3140              ADDS     r1,r1,#0x40           ;683
000074  6388              STR      r0,[r1,#0x38]         ;683
000076  613d              STR      r5,[r7,#0x10]
000078  e00f              B        |L9.154|
                  |L9.122|
;;;686    	}		
;;;687    	else	
;;;688      {
;;;689       FLASH_LED = 1;		
00007a  2001              MOVS     r0,#1
00007c  6138              STR      r0,[r7,#0x10]
;;;690    	 Get_Hall_State();	
00007e  f7fffffe          BL       Get_Hall_State
;;;691    	 SixStep_Commutation();		
000082  f7fffffe          BL       SixStep_Commutation
;;;692       EPWM_ConfigOutputChannel1(EPWM,0,u16_Duty1);
000086  2100              MOVS     r1,#0
000088  4630              MOV      r0,r6
00008a  6922              LDR      r2,[r4,#0x10]  ; u16_Duty1
00008c  f7fffffe          BL       EPWM_ConfigOutputChannel1
;;;693    	 EPWM_ConfigOutputChannel1(EPWM,1,u16_Duty1);	
000090  2101              MOVS     r1,#1
000092  4630              MOV      r0,r6
000094  6922              LDR      r2,[r4,#0x10]  ; u16_Duty1
000096  f7fffffe          BL       EPWM_ConfigOutputChannel1
                  |L9.154|
;;;694    	}
;;;695    //	
;;;696      /* Motor Stop when Command under STOP_DUTY */	 
;;;697      if(u8_Command_Stop_Flag)
00009a  78a1              LDRB     r1,[r4,#2]  ; u8_Command_Stop_Flag
00009c  2900              CMP      r1,#0
00009e  d000              BEQ      |L9.162|
;;;698      {
;;;699    	 u8_Motor_State = MOTOR_STOP;	
0000a0  71e5              STRB     r5,[r4,#7]
                  |L9.162|
;;;700      }
;;;701    //   /* Motor Stop When Motor LOCK Detection */	 
;;;702      if(u8_Lock_Detection_Flag)
0000a2  7a20              LDRB     r0,[r4,#8]  ; u8_Lock_Detection_Flag
0000a4  2800              CMP      r0,#0
0000a6  d001              BEQ      |L9.172|
;;;703      {	 
;;;704    	 u8_Motor_State = MOTOR_LOCK_ERROR;	
0000a8  2202              MOVS     r2,#2
0000aa  71e2              STRB     r2,[r4,#7]
                  |L9.172|
;;;705      }  	
;;;706    //	
;;;707    	/* Scan All STOP Flag (Stop Command & Lock Detection & OVLV)*/
;;;708    	if((u8_Command_Stop_Flag)||(u8_Lock_Detection_Flag))
0000ac  4301              ORRS     r1,r1,r0
0000ae  d002              BEQ      |L9.182|
;;;709    	 u8_StopMotor_Flag = 1;
0000b0  2001              MOVS     r0,#1
0000b2  7060              STRB     r0,[r4,#1]
0000b4  e000              B        |L9.184|
                  |L9.182|
;;;710    	else
;;;711    	 u8_StopMotor_Flag = 0;	
0000b6  7065              STRB     r5,[r4,#1]
                  |L9.184|
;;;712    				
;;;713    	/* Clear channel 2 period interrupt flag */
;;;714    	EPWM_ClearPeriodIntFlag(EPWM, 2);	
0000b8  2102              MOVS     r1,#2
0000ba  4630              MOV      r0,r6
0000bc  f7fffffe          BL       EPWM_ClearPeriodIntFlag
;;;715    }
0000c0  bdf8              POP      {r3-r7,pc}
;;;716    
                          ENDP

0000c2  0000              DCW      0x0000
                  |L9.196|
                          DCD      ||.data||
                  |L9.200|
                          DCD      0x00007fff
                  |L9.204|
                          DCD      0x0004c4b4
                  |L9.208|
                          DCD      0x50014000
                  |L9.212|
                          DCD      0x500048c0
                  |L9.216|
                          DCD      0x40040000
                  |L9.220|
                          DCD      0x00703f00

                          AREA ||i.EPWM_Init||, CODE, READONLY, ALIGN=2

                  EPWM_Init PROC
;;;351    /* EPWM Initialize */
;;;352    void EPWM_Init(void)	
000000  b510              PUSH     {r4,lr}
;;;353    {
;;;354    	  /* Set GPA multi-function pins for EPWM CH0~CH5 */
;;;355    		SYS->GPA_MFP = (SYS->GPA_MFP & (~SYS_GPA_MFP_PA0MFP_Msk));	
000002  2005              MOVS     r0,#5
000004  0700              LSLS     r0,r0,#28
000006  6b01              LDR      r1,[r0,#0x30]
000008  0909              LSRS     r1,r1,#4
00000a  0109              LSLS     r1,r1,#4
00000c  6301              STR      r1,[r0,#0x30]
;;;356    		SYS->GPA_MFP |= SYS_GPA_MFP_PA0_EPWM_CH0;
00000e  6b01              LDR      r1,[r0,#0x30]
000010  2203              MOVS     r2,#3
000012  4311              ORRS     r1,r1,r2
000014  6301              STR      r1,[r0,#0x30]
;;;357    		SYS->GPA_MFP = (SYS->GPA_MFP & (~SYS_GPA_MFP_PA1MFP_Msk));
000016  6b01              LDR      r1,[r0,#0x30]
000018  22f0              MOVS     r2,#0xf0
00001a  4391              BICS     r1,r1,r2
00001c  6301              STR      r1,[r0,#0x30]
;;;358    		SYS->GPA_MFP |= SYS_GPA_MFP_PA1_EPWM_CH1;		
00001e  6b01              LDR      r1,[r0,#0x30]
000020  2230              MOVS     r2,#0x30
000022  4311              ORRS     r1,r1,r2
000024  6301              STR      r1,[r0,#0x30]
;;;359    		SYS->GPA_MFP = (SYS->GPA_MFP & (~SYS_GPA_MFP_PA2MFP_Msk));
000026  6b01              LDR      r1,[r0,#0x30]
000028  220f              MOVS     r2,#0xf
00002a  0212              LSLS     r2,r2,#8
00002c  4391              BICS     r1,r1,r2
00002e  6301              STR      r1,[r0,#0x30]
;;;360    		SYS->GPA_MFP |= SYS_GPA_MFP_PA2_EPWM_CH2;
000030  6b01              LDR      r1,[r0,#0x30]
000032  2203              MOVS     r2,#3
000034  0212              LSLS     r2,r2,#8
000036  4311              ORRS     r1,r1,r2
000038  6301              STR      r1,[r0,#0x30]
;;;361    		SYS->GPA_MFP = (SYS->GPA_MFP & (~SYS_GPA_MFP_PA3MFP_Msk));
00003a  6b01              LDR      r1,[r0,#0x30]
00003c  220f              MOVS     r2,#0xf
00003e  0312              LSLS     r2,r2,#12
000040  4391              BICS     r1,r1,r2
000042  6301              STR      r1,[r0,#0x30]
;;;362    		SYS->GPA_MFP |= SYS_GPA_MFP_PA3_EPWM_CH3;
000044  6b01              LDR      r1,[r0,#0x30]
000046  2203              MOVS     r2,#3
000048  0312              LSLS     r2,r2,#12
00004a  4311              ORRS     r1,r1,r2
00004c  6301              STR      r1,[r0,#0x30]
;;;363    		SYS->GPA_MFP = (SYS->GPA_MFP & (~SYS_GPA_MFP_PA4MFP_Msk));
00004e  6b01              LDR      r1,[r0,#0x30]
000050  220f              MOVS     r2,#0xf
000052  0412              LSLS     r2,r2,#16
000054  4391              BICS     r1,r1,r2
000056  6301              STR      r1,[r0,#0x30]
;;;364    		SYS->GPA_MFP |= SYS_GPA_MFP_PA4_EPWM_CH4;
000058  6b01              LDR      r1,[r0,#0x30]
00005a  2203              MOVS     r2,#3
00005c  0412              LSLS     r2,r2,#16
00005e  4311              ORRS     r1,r1,r2
000060  6301              STR      r1,[r0,#0x30]
;;;365    		SYS->GPA_MFP = (SYS->GPA_MFP & (~SYS_GPA_MFP_PA5MFP_Msk));
000062  6b01              LDR      r1,[r0,#0x30]
000064  220f              MOVS     r2,#0xf
000066  0512              LSLS     r2,r2,#20
000068  4391              BICS     r1,r1,r2
00006a  6301              STR      r1,[r0,#0x30]
;;;366    		SYS->GPA_MFP |= SYS_GPA_MFP_PA5_EPWM_CH5;	
00006c  6b01              LDR      r1,[r0,#0x30]
00006e  2203              MOVS     r2,#3
000070  0512              LSLS     r2,r2,#20
000072  4311              ORRS     r1,r1,r2
000074  6301              STR      r1,[r0,#0x30]
;;;367    		/* Set GPA 0~5 as output mode */
;;;368    		GPIO_SetMode(PA, 0x3F, GPIO_MODE_OUTPUT);
000076  2201              MOVS     r2,#1
000078  213f              MOVS     r1,#0x3f
00007a  481b              LDR      r0,|L10.232|
00007c  f7fffffe          BL       GPIO_SetMode
;;;369    		
;;;370    	  /* Enable PWM Mask and Setting value as 0 */
;;;371    	  EPWM->PHCHG = 0x703F00;            //motor stop
000080  491b              LDR      r1,|L10.240|
000082  481a              LDR      r0,|L10.236|
000084  6388              STR      r0,[r1,#0x38]
;;;372    
;;;373    		/* Setting EPWM as Group mode */
;;;374    //	  EPWM_ENABLE_COMPLEMENTARY_MODE(EPWM);  
;;;375    //    EPWM_DISABLE_SYNC_MODE(EPWM);
;;;376    //    EPWM_DISABLE_COMPLEMENTARY_MODE(EPWM);
;;;377          EPWM_ENABLE_GROUP_MODE(EPWM);
000086  030c              LSLS     r4,r1,#12
000088  68a0              LDR      r0,[r4,#8]
00008a  0609              LSLS     r1,r1,#24
00008c  4308              ORRS     r0,r0,r1
00008e  60a0              STR      r0,[r4,#8]
;;;378    //		EPWM_ENABLE_SYNC_MODE(EPWM);
;;;379    
;;;380    		/* Setting EPWM DeadTime */
;;;381    //		EPWM_EnableDeadZone(EPWM,0,70);
;;;382    //		EPWM_EnableDeadZone(EPWM,2,70);
;;;383    //		EPWM_EnableDeadZone(EPWM,4,70);
;;;384    
;;;385    		/* Edge aligned */
;;;386    		EPWM->CTL &= ~(EPWM_CTL_CNTTYPE_Msk);
000090  68a0              LDR      r0,[r4,#8]
000092  0040              LSLS     r0,r0,#1
000094  0840              LSRS     r0,r0,#1
000096  60a0              STR      r0,[r4,#8]
;;;387    //		EPWM->CTL |= EPWM_CTL_CNTTYPE_Msk;
;;;388    		/* Auto Continous */
;;;389    		EPWM->CTL &= ~(EPWM_CTL_CNTMODE_Msk);
000098  68a1              LDR      r1,[r4,#8]
00009a  15a0              ASRS     r0,r4,#22
00009c  4381              BICS     r1,r1,r0
00009e  60a1              STR      r1,[r4,#8]
;;;390    		EPWM->CTL |= EPWM_CTL_CNTMODE_Msk;   
0000a0  68a1              LDR      r1,[r4,#8]
0000a2  4301              ORRS     r1,r1,r0
0000a4  60a1              STR      r1,[r4,#8]
;;;391    
;;;392        /* EPWM Period Setting */
;;;393    		EPWM->PERIOD = PWM_CNR;
0000a6  200f              MOVS     r0,#0xf
0000a8  01c0              LSLS     r0,r0,#7
0000aa  60e0              STR      r0,[r4,#0xc]
;;;394    	  EPWM->CMPDAT[0] = 0;
0000ac  2000              MOVS     r0,#0
0000ae  6260              STR      r0,[r4,#0x24]
;;;395    		EPWM->CMPDAT[1] = 0;
0000b0  62a0              STR      r0,[r4,#0x28]
;;;396    //	  EPWM->CMPDAT[2] = 0;
;;;397    //		EPWM->CMPDAT[3] = 0;
;;;398    //		EPWM->CMPDAT[4] = 0;
;;;399    //    EPWM->CMPDAT[5] = 0;		
;;;400        EPWM_ConfigOutputChannel1(EPWM,0,0);
0000b2  4602              MOV      r2,r0
0000b4  4601              MOV      r1,r0
0000b6  4620              MOV      r0,r4
0000b8  f7fffffe          BL       EPWM_ConfigOutputChannel1
;;;401    	  EPWM_ConfigOutputChannel1(EPWM,1,0);	
0000bc  2200              MOVS     r2,#0
0000be  2101              MOVS     r1,#1
0000c0  4620              MOV      r0,r4
0000c2  f7fffffe          BL       EPWM_ConfigOutputChannel1
;;;402    //    EPWM_ConfigOutputChannel1(EPWM,2,2048);
;;;403    //		EPWM_ConfigOutputChannel1(EPWM,3,1024);
;;;404    //    EPWM_ConfigOutputChannel1(EPWM,4,3072);
;;;405    //    EPWM_ConfigOutputChannel1(EPWM,5,3072);			
;;;406    			
;;;407    		/* Enable EPWM channel 2 period interrupt. */
;;;408    		EPWM_EnablePeriodInt(EPWM, 2, 0);
0000c6  2200              MOVS     r2,#0
0000c8  2102              MOVS     r1,#2
0000ca  4620              MOV      r0,r4
0000cc  f7fffffe          BL       EPWM_EnablePeriodInt
0000d0  4908              LDR      r1,|L10.244|
0000d2  2020              MOVS     r0,#0x20
0000d4  6008              STR      r0,[r1,#0]
;;;409    		NVIC_EnableIRQ(EPWM_IRQn);
;;;410    		NVIC_SetPriority(EPWM_IRQn,2);
0000d6  2102              MOVS     r1,#2
0000d8  2005              MOVS     r0,#5
0000da  f7fffffe          BL       NVIC_SetPriority
;;;411    		
;;;412    		/* Output Inverter */
;;;413    // 		EPWM_ENABLE_OUTPUT_INVERTER(EPWM,4);
;;;414    // 		EPWM_ENABLE_OUTPUT_INVERTER(EPWM,3);
;;;415    		
;;;416    		/* Start */
;;;417    		EPWM_Start(EPWM, 0x3F);
0000de  213f              MOVS     r1,#0x3f
0000e0  4620              MOV      r0,r4
0000e2  f7fffffe          BL       EPWM_Start
;;;418    }
0000e6  bd10              POP      {r4,pc}
;;;419    
                          ENDP

                  |L10.232|
                          DCD      0x50004000
                  |L10.236|
                          DCD      0x00703f00
                  |L10.240|
                          DCD      0x40040040
                  |L10.244|
                          DCD      0xe000e100

                          AREA ||i.GPIO_Init||, CODE, READONLY, ALIGN=2

                  GPIO_Init PROC
;;;197    /* GPIO Initialize */
;;;198    void GPIO_Init(void)
000000  b510              PUSH     {r4,lr}
;;;199    {
;;;200    		/* Set IO */
;;;201    //		SYS->GPB_MFP = (SYS->GPB_MFP & (~SYS_GPB_MFP_PB4MFP_Msk));
;;;202    //		SYS->GPB_MFP |= SYS_GPB_MFP_PB4_GPIO;	
;;;203    //		SYS->GPD_MFP = (SYS->GPD_MFP & (~SYS_GPD_MFP_PD3MFP_Msk));
;;;204    //		SYS->GPD_MFP |= SYS_GPD_MFP_PD3_GPIO;
;;;205    		SYS->GPD_MFP = (SYS->GPD_MFP & (~SYS_GPD_MFP_PD4MFP_Msk));
000002  2005              MOVS     r0,#5
000004  0700              LSLS     r0,r0,#28
000006  6bc1              LDR      r1,[r0,#0x3c]
000008  220f              MOVS     r2,#0xf
00000a  0412              LSLS     r2,r2,#16
00000c  4391              BICS     r1,r1,r2
00000e  63c1              STR      r1,[r0,#0x3c]
;;;206    		SYS->GPD_MFP |= SYS_GPD_MFP_PD4_GPIO;	
000010  6bc1              LDR      r1,[r0,#0x3c]
000012  63c1              STR      r1,[r0,#0x3c]
;;;207    		
;;;208    		GPIO_SetMode(PD, BIT4, GPIO_MODE_OUTPUT);
000014  2201              MOVS     r2,#1
000016  2110              MOVS     r1,#0x10
000018  4801              LDR      r0,|L11.32|
00001a  f7fffffe          BL       GPIO_SetMode
;;;209    		
;;;210    	  #ifdef PWM_DIRECT_INPUT
;;;211    		/* Setting PC2 as PWM direct command Input */
;;;212    		SYS->GPC_MFP = (SYS->GPC_MFP & (~SYS_GPC_MFP_PC2MFP_Msk));
;;;213    		SYS->GPC_MFP |= SYS_GPC_MFP_PC2_CCAP;	
;;;214    		GPIO_SetMode(PC, BIT2, GPIO_MODE_INPUT);
;;;215    		GPIO_ENABLE_PULL_LOW(PC,BIT2);
;;;216    		PC->SMTEN |= BIT2;	
;;;217    		#else
;;;218    	  #endif
;;;219    //		/* Setting PD3 as Hall Input */
;;;220    //		GPIO_SetMode(PD, BIT3, GPIO_MODE_INPUT);		
;;;221    		
;;;222    		/* schmitt trigger enable and debounce setting*/
;;;223    //		PD->SMTEN |= BIT3;
;;;224    //		GPIO_ENABLE_DEBOUNCE(PD,BIT3);	
;;;225    //		GPIO_SET_DEBOUNCE_TIME(GPIO_DBCTL_DBCLKSRC_HCLK,GPIO_DBCTL_DBCLKSEL_4);
;;;226    //		/*PD3 enable both edge (rising & falling) Interrupt*/
;;;227    //		PD->INTEN |= BIT3 | BIT19;
;;;228    //		NVIC_EnableIRQ(GP_IRQn);
;;;229    //		NVIC_SetPriority(GP_IRQn,0);	
;;;230    }
00001e  bd10              POP      {r4,pc}
;;;231    
                          ENDP

                  |L11.32|
                          DCD      0x500040c0

                          AREA ||i.Get_Hall_State||, CODE, READONLY, ALIGN=2

                  Get_Hall_State PROC
;;;998    
;;;999    void Get_Hall_State(void)
000000  480a              LDR      r0,|L12.44|
;;;1000   {
;;;1001   	 #ifdef HALL_TYPE1 
;;;1002   	  u8_HallState = 0;
000002  2100              MOVS     r1,#0
000004  7241              STRB     r1,[r0,#9]
;;;1003   	  if(HALL_U) u8_HallState+=4;
000006  490a              LDR      r1,|L12.48|
000008  680a              LDR      r2,[r1,#0]
00000a  2a00              CMP      r2,#0
00000c  d001              BEQ      |L12.18|
00000e  2204              MOVS     r2,#4
000010  7242              STRB     r2,[r0,#9]
                  |L12.18|
;;;1004   	  if(HALL_V) u8_HallState+=2;
000012  684a              LDR      r2,[r1,#4]
000014  2a00              CMP      r2,#0
000016  d002              BEQ      |L12.30|
000018  7a42              LDRB     r2,[r0,#9]  ; u8_HallState
00001a  1c92              ADDS     r2,r2,#2
00001c  7242              STRB     r2,[r0,#9]
                  |L12.30|
;;;1005   	  if(HALL_W) u8_HallState+=1;
00001e  6889              LDR      r1,[r1,#8]
000020  2900              CMP      r1,#0
000022  d002              BEQ      |L12.42|
000024  7a41              LDRB     r1,[r0,#9]  ; u8_HallState
000026  1c49              ADDS     r1,r1,#1
000028  7241              STRB     r1,[r0,#9]
                  |L12.42|
;;;1006   	 #else
;;;1007   	  u8_HallState = 0;
;;;1008   	  if(HALL_U==0) u8_HallState+=4;
;;;1009   	  if(HALL_V==0) u8_HallState+=2;
;;;1010   	  if(HALL_W==0) u8_HallState+=1;	
;;;1011   	 #endif
;;;1012   }
00002a  4770              BX       lr
;;;1013   
                          ENDP

                  |L12.44|
                          DCD      ||.data||
                  |L12.48|
                          DCD      0x50004840

                          AREA ||i.Motor_Start||, CODE, READONLY, ALIGN=2

                  Motor_Start PROC
;;;890    /* Motor start Initialize */
;;;891    void Motor_Start(void)
000000  2100              MOVS     r1,#0
;;;892    {
;;;893    	/* Initialize gobal variable when motor start (all Counter)*/
;;;894    //	u32_CCAP_HighDuty = 0;
;;;895    	u8_Hall_SW_Counter = 0;
000002  4808              LDR      r0,|L13.36|
;;;896      u8_Hall_SW_Flag = 0;	
;;;897    	u8_Duty_Loop_Counter = 0;
;;;898      u8_Speed_Loop_Counter = 0;
;;;899      u16_SpeedCommand_Kp_Gain = 0;
;;;900    	u16_SpeedCommand_Ki_Sum = 0;
;;;901    	u16_DutyCommand = STARTUP;
000004  22c8              MOVS     r2,#0xc8
000006  7181              STRB     r1,[r0,#6]            ;895
000008  7141              STRB     r1,[r0,#5]            ;896
00000a  70c1              STRB     r1,[r0,#3]            ;897
00000c  7101              STRB     r1,[r0,#4]            ;898
00000e  64c1              STR      r1,[r0,#0x4c]         ;900  ; u16_SpeedCommand_Kp_Gain
;;;902    	u16_Duty1 = STARTUP;
000010  6342              STR      r2,[r0,#0x34]  ; u16_DutyCommand
;;;903      u32_Eletric_Spd_Avg = 0;
000012  6541              STR      r1,[r0,#0x54]  ; u16_SpeedCommand_Ki_Sum
;;;904      u32_Mechanical_Spd_Avg = 0;	
000014  6701              STR      r1,[r0,#0x70]  ; u32_Eletric_Spd_Avg
;;;905      u32_Lock_Detection_Counter = 0;
000016  6781              STR      r1,[r0,#0x78]  ; u32_Mechanical_Spd_Avg
;;;906      u32_Lock_Release_Counter = 0;
000018  6581              STR      r1,[r0,#0x58]  ; u32_Lock_Detection_Counter
;;;907      u8_ClockWise = 0;
00001a  6102              STR      r2,[r0,#0x10]  ; u16_Duty1
00001c  65c1              STR      r1,[r0,#0x5c]  ; u32_Lock_Release_Counter
00001e  7281              STRB     r1,[r0,#0xa]
;;;908    //	Get_Hall_State();	
;;;909    	
;;;910    //	/* H-Bridge Commutation Hall state*/
;;;911    //	if(PD3)
;;;912    //  u8_Single_Commutation_State = 2;
;;;913    //  else
;;;914    //	u8_Single_Commutation_State = 0;	
;;;915    }
000020  4770              BX       lr
;;;916    
                          ENDP

000022  0000              DCW      0x0000
                  |L13.36|
                          DCD      ||.data||

                          AREA ||i.Motor_State_Update||, CODE, READONLY, ALIGN=2

                  Motor_State_Update PROC
;;;924    /* Motor State */
;;;925    void Motor_State_Update(void)
000000  b570              PUSH     {r4-r6,lr}
;;;926    {
;;;927      switch(u8_Motor_State)
000002  4c1a              LDR      r4,|L14.108|
000004  2500              MOVS     r5,#0
000006  79e0              LDRB     r0,[r4,#7]  ; u8_Motor_State
000008  2601              MOVS     r6,#1
00000a  0003              MOVS     r3,r0
00000c  f7fffffe          BL       __ARM_common_switch8
000010  03030c18          DCB      0x03,0x03,0x0c,0x18
000014  0b00              DCB      0x0b,0x00
;;;928    	{ 
;;;929    	 /* Motor Stop */
;;;930    	 case MOTOR_STOP:
;;;931    		 if(u16_VSP_Command_Input >= START_DUTY)
000016  6b20              LDR      r0,[r4,#0x30]  ; u16_VSP_Command_Input
000018  2864              CMP      r0,#0x64
00001a  d304              BCC      |L14.38|
;;;932    		 {			 
;;;933          Motor_Start();
00001c  f7fffffe          BL       Motor_Start
;;;934    			u8_Command_Stop_Flag = 0;
000020  70a5              STRB     r5,[r4,#2]
;;;935          u8_Lock_Detection_Flag = 0;
000022  7225              STRB     r5,[r4,#8]
;;;936    //      ECAP_DISABLE_CNT(ECAP);
;;;937    //			ECAP_CNT_STOP(ECAP);
;;;938    //			ECAP_ENABLE_CNT(ECAP);
;;;939    //		  ECAP_CNT_START(ECAP);			 
;;;940    			u8_Motor_State = MOTOR_RUN;
000024  71e6              STRB     r6,[r4,#7]
                  |L14.38|
;;;941         }   
;;;942    	 break;
;;;943    
;;;944       /* Motor RUN */
;;;945    	 case MOTOR_RUN:
;;;946       
;;;947    	 /* Lock Detection Counter */
;;;948    	 if(u32_Lock_Detection_Counter < LOCK_DETECTION_TIME)
;;;949    	 {
;;;950    	  u32_Lock_Detection_Counter++;
;;;951        u8_Lock_Detection_Flag = 0;		 
;;;952    	 }
;;;953    	 else
;;;954    	 { 
;;;955        u8_Lock_Detection_Flag = 1;
;;;956        u32_Lock_Detection_Counter = 	LOCK_DETECTION_TIME;	 
;;;957       }
;;;958    	 break;
;;;959    
;;;960    	 /* Motor Lock Error */
;;;961    	 case MOTOR_LOCK_ERROR:
;;;962    		/* If Command Stop Flag than Release the Lock Mode */ 
;;;963        if(u8_Command_Stop_Flag)
;;;964    		{
;;;965         u32_Lock_Detection_Counter = 0;
;;;966    		 u32_Lock_Release_Counter = 0;	
;;;967         u8_Lock_Detection_Flag = 0;
;;;968         u8_Motor_State = MOTOR_STOP;
;;;969        }
;;;970        else
;;;971        {
;;;972         /* Restart From Lock State */
;;;973    		 if(u32_Lock_Release_Counter < LOCK_RESTART_DELAY)
;;;974         { 
;;;975    			u32_Lock_Release_Counter++;
;;;976    		  Motor_Stop();
;;;977    			u8_Motor_State = MOTOR_LOCK_ERROR;
;;;978    		 }	 
;;;979         else
;;;980    		 {		  
;;;981    			u32_Lock_Release_Counter = 0;
;;;982          u32_Lock_Detection_Counter = 0;			 
;;;983          u8_Lock_Detection_Flag = 0;
;;;984          u8_Motor_State = MOTOR_STOP;
;;;985         }			 
;;;986        }			
;;;987    	 break;	 
;;;988    	 
;;;989    	 /* Motor OVLV Error */
;;;990    	 case MOTOR_DCBUS_ERROR:		 
;;;991    	 break;	 
;;;992    
;;;993    	 /* Motor SHORT Current Error */
;;;994    	 case MOTOR_SHORT_ERROR:		 
;;;995    	 break;	 	 
;;;996      }	
;;;997    }
000026  bd70              POP      {r4-r6,pc}
000028  21ff              MOVS     r1,#0xff              ;948
00002a  6da0              LDR      r0,[r4,#0x58]         ;948  ; u32_Lock_Detection_Counter
00002c  3191              ADDS     r1,r1,#0x91           ;948
00002e  4288              CMP      r0,r1                 ;948
000030  d203              BCS      |L14.58|
000032  1c40              ADDS     r0,r0,#1              ;948
000034  65a0              STR      r0,[r4,#0x58]         ;951  ; u32_Lock_Detection_Counter
000036  7225              STRB     r5,[r4,#8]            ;951
000038  bd70              POP      {r4-r6,pc}
                  |L14.58|
00003a  7226              STRB     r6,[r4,#8]            ;955
00003c  65a1              STR      r1,[r4,#0x58]         ;956  ; u32_Lock_Detection_Counter
00003e  bd70              POP      {r4-r6,pc}
000040  78a0              LDRB     r0,[r4,#2]            ;963  ; u8_Command_Stop_Flag
000042  2800              CMP      r0,#0                 ;963
000044  d002              BEQ      |L14.76|
000046  65a5              STR      r5,[r4,#0x58]         ;966  ; u32_Lock_Detection_Counter
000048  65e5              STR      r5,[r4,#0x5c]         ;968  ; u32_Lock_Release_Counter
00004a  e00c              B        |L14.102|
                  |L14.76|
00004c  2119              MOVS     r1,#0x19              ;973
00004e  6de0              LDR      r0,[r4,#0x5c]         ;973  ; u32_Lock_Release_Counter
000050  0149              LSLS     r1,r1,#5              ;973
000052  4288              CMP      r0,r1                 ;973
000054  d205              BCS      |L14.98|
000056  1c40              ADDS     r0,r0,#1              ;973
000058  65e0              STR      r0,[r4,#0x5c]         ;973  ; u32_Lock_Release_Counter
00005a  4906              LDR      r1,|L14.116|
00005c  4804              LDR      r0,|L14.112|
00005e  6388              STR      r0,[r1,#0x38]         ;973
000060  bd70              POP      {r4-r6,pc}
                  |L14.98|
000062  65e5              STR      r5,[r4,#0x5c]         ;982  ; u32_Lock_Release_Counter
000064  65a5              STR      r5,[r4,#0x58]         ;982  ; u32_Lock_Detection_Counter
                  |L14.102|
000066  7225              STRB     r5,[r4,#8]            ;967
000068  71e5              STRB     r5,[r4,#7]            ;968
00006a  bd70              POP      {r4-r6,pc}
;;;998    
                          ENDP

                  |L14.108|
                          DCD      ||.data||
                  |L14.112|
                          DCD      0x00703f00
                  |L14.116|
                          DCD      0x40040040

                          AREA ||i.Motor_Stop||, CODE, READONLY, ALIGN=2

                  Motor_Stop PROC
;;;917    /* Motor Stop */
;;;918    void Motor_Stop(void)
000000  4902              LDR      r1,|L15.12|
;;;919    {
;;;920    	/* Enable PWM Mask and Setting value as 0 */  
;;;921    	EPWM->PHCHG = 0x703F00; // motor stop
000002  4801              LDR      r0,|L15.8|
000004  6388              STR      r0,[r1,#0x38]
;;;922    }
000006  4770              BX       lr
;;;923    
                          ENDP

                  |L15.8|
                          DCD      0x00703f00
                  |L15.12|
                          DCD      0x40040040

                          AREA ||i.NVIC_SetPriority||, CODE, READONLY, ALIGN=2

                  NVIC_SetPriority PROC
;;;570     */
;;;571    __STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
000000  0783              LSLS     r3,r0,#30
;;;572    {
;;;573      if(IRQn < 0) {
;;;574        SCB->SHP[_SHP_IDX(IRQn)] = (SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
000002  22ff              MOVS     r2,#0xff
000004  0edb              LSRS     r3,r3,#27
000006  409a              LSLS     r2,r2,r3
000008  0789              LSLS     r1,r1,#30
00000a  0e09              LSRS     r1,r1,#24
00000c  4099              LSLS     r1,r1,r3
00000e  2800              CMP      r0,#0                 ;573
000010  da0b              BGE      |L16.42|
000012  0700              LSLS     r0,r0,#28
000014  0f00              LSRS     r0,r0,#28
000016  3808              SUBS     r0,r0,#8
000018  0883              LSRS     r3,r0,#2
00001a  4808              LDR      r0,|L16.60|
00001c  009b              LSLS     r3,r3,#2
00001e  1818              ADDS     r0,r3,r0
000020  69c3              LDR      r3,[r0,#0x1c]
000022  4393              BICS     r3,r3,r2
000024  430b              ORRS     r3,r3,r1
000026  61c3              STR      r3,[r0,#0x1c]
;;;575            (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
;;;576      else {
;;;577        NVIC->IP[_IP_IDX(IRQn)] = (NVIC->IP[_IP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
;;;578            (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
;;;579    }
000028  4770              BX       lr
                  |L16.42|
00002a  0883              LSRS     r3,r0,#2              ;577
00002c  4804              LDR      r0,|L16.64|
00002e  009b              LSLS     r3,r3,#2              ;577
000030  1818              ADDS     r0,r3,r0              ;577
000032  6803              LDR      r3,[r0,#0]            ;577
000034  4393              BICS     r3,r3,r2              ;577
000036  430b              ORRS     r3,r3,r1              ;577
000038  6003              STR      r3,[r0,#0]            ;577
00003a  4770              BX       lr
;;;580    
                          ENDP

                  |L16.60|
                          DCD      0xe000ed00
                  |L16.64|
                          DCD      0xe000e400

                          AREA ||i.PGA_Init||, CODE, READONLY, ALIGN=2

                  PGA_Init PROC
;;;420    /* PGA Initialize */
;;;421    void PGA_Init(void) 
000000  b570              PUSH     {r4-r6,lr}
;;;422    {
;;;423        /* Reset Module */ 
;;;424      	SYS_ResetModule(PGA_RST);
000002  2001              MOVS     r0,#1
000004  0300              LSLS     r0,r0,#12
000006  f7fffffe          BL       SYS_ResetModule
;;;425    
;;;426        /* Select IP clock source */
;;;427    
;;;428        /*---------------------------------------------------------------------------------------------------------*/
;;;429        /* Init I/O Multi-function                                                                                 */
;;;430        /*---------------------------------------------------------------------------------------------------------*/
;;;431        /* Set GPB multi-function pins for PGA_I GPB3 */
;;;432        SYS->GPB_MFP = (SYS->GPB_MFP & ~(SYS_GPB_MFP_PB3MFP_Msk));
00000a  2405              MOVS     r4,#5
00000c  0724              LSLS     r4,r4,#28
00000e  6b60              LDR      r0,[r4,#0x34]
000010  250f              MOVS     r5,#0xf
000012  032d              LSLS     r5,r5,#12
000014  43a8              BICS     r0,r0,r5
000016  6360              STR      r0,[r4,#0x34]
;;;433        SYS->GPB_MFP|= SYS_GPB_MFP_PB3_PGA_I;
000018  6b60              LDR      r0,[r4,#0x34]
00001a  2603              MOVS     r6,#3
00001c  0376              LSLS     r6,r6,#13
00001e  4330              ORRS     r0,r0,r6
000020  6360              STR      r0,[r4,#0x34]
;;;434        // The analog input port pins must be configured as input type before the PGA function is enabled.
;;;435        GPIO_SetMode(PB, BIT3, GPIO_MODE_INPUT);
000022  2200              MOVS     r2,#0
000024  2108              MOVS     r1,#8
000026  4807              LDR      r0,|L17.68|
000028  f7fffffe          BL       GPIO_SetMode
;;;436    
;;;437        /* Set GPC multi-function pins for PGA_O GPC3 */
;;;438        SYS->GPC_MFP = (SYS->GPC_MFP & ~(SYS_GPC_MFP_PC3MFP_Msk));
00002c  6ba0              LDR      r0,[r4,#0x38]
00002e  43a8              BICS     r0,r0,r5
000030  63a0              STR      r0,[r4,#0x38]
;;;439        SYS->GPC_MFP |= (SYS_GPC_MFP_PC3_PGA_O);
000032  6ba0              LDR      r0,[r4,#0x38]
000034  4330              ORRS     r0,r0,r6
000036  63a0              STR      r0,[r4,#0x38]
;;;440    	  
;;;441    	  /* Enable PGA adn setting Gain */
;;;442        PGA_Open(PGA, PGA_GAIN_4, PGA_CTL_PGAOUTEN_Msk);
000038  2204              MOVS     r2,#4
00003a  2102              MOVS     r1,#2
00003c  4802              LDR      r0,|L17.72|
00003e  f7fffffe          BL       PGA_Open
;;;443    }
000042  bd70              POP      {r4-r6,pc}
;;;444    
                          ENDP

                  |L17.68|
                          DCD      0x50004040
                  |L17.72|
                          DCD      0x400f0000

                          AREA ||i.SYS_Init||, CODE, READONLY, ALIGN=2

                  SYS_Init PROC
;;;164    /* System Initialize */
;;;165    void SYS_Init(void)
000000  b510              PUSH     {r4,lr}
000002  2159              MOVS     r1,#0x59
000004  4813              LDR      r0,|L18.84|
000006  2216              MOVS     r2,#0x16
000008  2388              MOVS     r3,#0x88
                  |L18.10|
00000a  6001              STR      r1,[r0,#0]
00000c  6002              STR      r2,[r0,#0]
00000e  6003              STR      r3,[r0,#0]
000010  6804              LDR      r4,[r0,#0]
000012  2c00              CMP      r4,#0
000014  d0f9              BEQ      |L18.10|
;;;166    {
;;;167    	  SYS_UnlockReg();
;;;168        /* Enable 48MHz HIRC */
;;;169        CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
000016  2004              MOVS     r0,#4
000018  f7fffffe          BL       CLK_EnableXtalRC
;;;170    
;;;171        /* Waiting for 48MHz clock ready */
;;;172        CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
00001c  2010              MOVS     r0,#0x10
00001e  f7fffffe          BL       CLK_WaitClockReady
;;;173    
;;;174        /* HCLK Clock source from HIRC */
;;;175        CLK_SetHCLK(CLK_HCLK_SRC_HIRC,CLK_CLKDIV_HCLK(1));
000022  2100              MOVS     r1,#0
000024  2003              MOVS     r0,#3
000026  f7fffffe          BL       CLK_SetHCLK
;;;176    
;;;177        /* Enable IP clock */
;;;178        CLK_EnableModuleClock(EPWM_MODULE);
00002a  480b              LDR      r0,|L18.88|
00002c  f7fffffe          BL       CLK_EnableModuleClock
;;;179    	
;;;180         // Enable EADC clock
;;;181        CLK_EnableModuleClock(EADC_MODULE);
000030  480a              LDR      r0,|L18.92|
000032  f7fffffe          BL       CLK_EnableModuleClock
;;;182    	
;;;183         // Enable ACMP clock
;;;184        CLK_EnableModuleClock(ECAP_MODULE);
000036  4808              LDR      r0,|L18.88|
000038  380c              SUBS     r0,r0,#0xc
00003a  f7fffffe          BL       CLK_EnableModuleClock
;;;185    	
;;;186        /* Enable IP clock */
;;;187        CLK_EnableModuleClock(PGA_MODULE);
00003e  4806              LDR      r0,|L18.88|
000040  3808              SUBS     r0,r0,#8
000042  f7fffffe          BL       CLK_EnableModuleClock
;;;188    	
;;;189    	  /* Enable HDIV clock */
;;;190        CLK_EnableModuleClock(HDIV_MODULE);
000046  2004              MOVS     r0,#4
000048  f7fffffe          BL       CLK_EnableModuleClock
;;;191    		
;;;192        /* Update System Core Clock */
;;;193        /* User can use SystemCoreClockUpdate() to calculate SystemCoreClock and cyclesPerUs automatically. */
;;;194        SystemCoreClockUpdate();
00004c  f7fffffe          BL       SystemCoreClockUpdate
;;;195    }
000050  bd10              POP      {r4,pc}
;;;196    
                          ENDP

000052  0000              DCW      0x0000
                  |L18.84|
                          DCD      0x50000100
                  |L18.88|
                          DCD      0x40000014
                  |L18.92|
                          DCD      0x4888221c

                          AREA ||i.SixStep_Commutation||, CODE, READONLY, ALIGN=2

                  SixStep_Commutation PROC
;;;1013   
;;;1014   void SixStep_Commutation(void)
000000  b5f0              PUSH     {r4-r7,lr}
;;;1015   {
;;;1016    if(u8_ClockWise)
000002  4819              LDR      r0,|L19.104|
;;;1017    {	 
;;;1018   	 switch(u8_HallState)
;;;1019   	 {
;;;1020   		 case 1:
;;;1021   		 EPWM->PHCHG = 0x703B02;	 
;;;1022   		 break;
;;;1023   	 
;;;1024   		 case 2:
;;;1025   		 EPWM->PHCHG = 0x703E20;		 
;;;1026   		 break;
;;;1027   
;;;1028   		 case 3:
;;;1029   		 EPWM->PHCHG = 0x703B20;
000004  4c19              LDR      r4,|L19.108|
;;;1030   		 break;
;;;1031   
;;;1032   		 case 4:
;;;1033   		 EPWM->PHCHG = 0x702F08;
000006  4d1b              LDR      r5,|L19.116|
000008  4f17              LDR      r7,|L19.104|
00000a  7a83              LDRB     r3,[r0,#0xa]          ;1016  ; u8_ClockWise
00000c  4917              LDR      r1,|L19.108|
00000e  4a18              LDR      r2,|L19.112|
000010  341e              ADDS     r4,r4,#0x1e           ;1029
;;;1034   		 break;
;;;1035   
;;;1036   		 case 5:
;;;1037   		 EPWM->PHCHG = 0x702F02;
000012  1fae              SUBS     r6,r5,#6
000014  4818              LDR      r0,|L19.120|
000016  7a7f              LDRB     r7,[r7,#9]            ;1018
000018  2b00              CMP      r3,#0                 ;1016
00001a  d011              BEQ      |L19.64|
00001c  003b              MOVS     r3,r7                 ;1018
00001e  f7fffffe          BL       __ARM_common_switch8
000022  071f              DCB      0x07,0x1f
000024  0507090b          DCB      0x05,0x07,0x09,0x0b
000028  0d1c1f00          DCB      0x0d,0x1c,0x1f,0x00
                  |L19.44|
00002c  6381              STR      r1,[r0,#0x38]         ;1021
;;;1038   		 break;
;;;1039   
;;;1040   		 case 6:
;;;1041   		 EPWM->PHCHG = 0x703E08;
;;;1042   		 break;
;;;1043   
;;;1044   		 default:
;;;1045   		 EPWM->PHCHG = 0x703F00;
;;;1046   		 break;
;;;1047   	 }
;;;1048    }
;;;1049    else
;;;1050    {
;;;1051      switch(u8_HallState)
;;;1052   	 {
;;;1053   		 case 1:
;;;1054   		 EPWM->PHCHG = 0x703E08;	 
;;;1055   		 break;
;;;1056   	 
;;;1057   		 case 2:
;;;1058   		 EPWM->PHCHG = 0x702F02;		 
;;;1059   		 break;
;;;1060   
;;;1061   		 case 3:
;;;1062   		 EPWM->PHCHG = 0x702F08;
;;;1063   		 break;
;;;1064   
;;;1065   		 case 4:
;;;1066   		 EPWM->PHCHG = 0x703B20;
;;;1067   		 break;
;;;1068   
;;;1069   		 case 5:
;;;1070   		 EPWM->PHCHG = 0x703E20;
;;;1071   		 break;
;;;1072   
;;;1073   		 case 6:
;;;1074   		 EPWM->PHCHG = 0x703B02;
;;;1075   		 break;
;;;1076   
;;;1077   		 default:
;;;1078   		 EPWM->PHCHG = 0x703F00;
;;;1079   		 break;
;;;1080   	 }
;;;1081    }
;;;1082   }
00002e  bdf0              POP      {r4-r7,pc}
                  |L19.48|
000030  6382              STR      r2,[r0,#0x38]         ;1025
000032  bdf0              POP      {r4-r7,pc}
                  |L19.52|
000034  6384              STR      r4,[r0,#0x38]         ;1029
000036  bdf0              POP      {r4-r7,pc}
                  |L19.56|
000038  6385              STR      r5,[r0,#0x38]         ;1033
00003a  bdf0              POP      {r4-r7,pc}
                  |L19.60|
00003c  6386              STR      r6,[r0,#0x38]         ;1037
00003e  bdf0              POP      {r4-r7,pc}
                  |L19.64|
000040  003b              MOVS     r3,r7                 ;1051
000042  f7fffffe          BL       __ARM_common_switch8
000046  070d              DCB      0x07,0x0d
000048  0a090807          DCB      0x0a,0x09,0x08,0x07
00004c  06050d00          DCB      0x06,0x05,0x0d,0x00
000050  e7ec              B        |L19.44|
000052  e7ed              B        |L19.48|
000054  e7ee              B        |L19.52|
000056  e7ef              B        |L19.56|
000058  e7f0              B        |L19.60|
00005a  4905              LDR      r1,|L19.112|
00005c  3918              SUBS     r1,r1,#0x18           ;1054
00005e  e7e5              B        |L19.44|
000060  4903              LDR      r1,|L19.112|
000062  31e0              ADDS     r1,r1,#0xe0           ;1078
000064  e7e2              B        |L19.44|
;;;1083   /*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/
                          ENDP

000066  0000              DCW      0x0000
                  |L19.104|
                          DCD      ||.data||
                  |L19.108|
                          DCD      0x00703b02
                  |L19.112|
                          DCD      0x00703e20
                  |L19.116|
                          DCD      0x00702f08
                  |L19.120|
                          DCD      0x40040040

                          AREA ||i.TMR1_IRQHandler||, CODE, READONLY, ALIGN=2

                  TMR1_IRQHandler PROC
;;;625    /* Timer1 Interrupt */
;;;626    void TMR1_IRQHandler(void)
000000  4901              LDR      r1,|L20.8|
000002  2001              MOVS     r0,#1
000004  6088              STR      r0,[r1,#8]
;;;627    {
;;;628    //	/* H-Bridge Commutation Hall state*/
;;;629    //	if(PD3)
;;;630    //    u8_Single_Commutation_State = 2;
;;;631    //  else
;;;632    //	  u8_Single_Commutation_State = 0;	
;;;633    //	
;;;634    //	/* Disable PWM clock */
;;;635    //	CLK_EnableModuleClock(EPWM_MODULE);
;;;636    //	
;;;637    //  /* Disable PWM intterupt */
;;;638    //  NVIC_EnableIRQ(EPWM_IRQn);
;;;639    		
;;;640    	/* clear timer interrupt flag */
;;;641       TIMER_ClearIntFlag(TIMER1);
;;;642    }
000006  4770              BX       lr
;;;643    
                          ENDP

                  |L20.8|
                          DCD      0x40010020

                          AREA ||i.Timer0_Init||, CODE, READONLY, ALIGN=2

                  Timer0_Init PROC
;;;470    /* Timer 0 initialize as continous function mode*/
;;;471    void Timer0_Init(void)
000000  b510              PUSH     {r4,lr}
;;;472    {
;;;473    		/* Enable IP clock */
;;;474    		CLK_EnableModuleClock(TMR0_MODULE);
000002  4c0e              LDR      r4,|L21.60|
000004  4620              MOV      r0,r4
000006  f7fffffe          BL       CLK_EnableModuleClock
;;;475    
;;;476    		/* Select IP clock source */
;;;477    		CLK_SetModuleClock(TMR0_MODULE, CLK_TMR0_SRC_HIRC, 0);
00000a  2107              MOVS     r1,#7
00000c  2200              MOVS     r2,#0
00000e  0209              LSLS     r1,r1,#8
000010  4620              MOV      r0,r4
000012  f7fffffe          BL       CLK_SetModuleClock
;;;478    		
;;;479    		/* Timer0 Prescale to 1MHz */
;;;480    		TIMER0-> CTL &= ~TIMER_CTL_PSC_Msk;
000016  480a              LDR      r0,|L21.64|
000018  6801              LDR      r1,[r0,#0]
00001a  0a09              LSRS     r1,r1,#8
00001c  0209              LSLS     r1,r1,#8
00001e  6001              STR      r1,[r0,#0]
;;;481    		TIMER0-> CTL |= 2;        // 48MHz/3 = 16MHz
000020  6801              LDR      r1,[r0,#0]
000022  2202              MOVS     r2,#2
000024  4311              ORRS     r1,r1,r2
000026  6001              STR      r1,[r0,#0]
;;;482    		
;;;483    		/* Timer0 set to periodic mode */
;;;484    		TIMER0-> CTL |= TIMER_CONTINUOUS_MODE;
000028  6801              LDR      r1,[r0,#0]
00002a  2203              MOVS     r2,#3
00002c  06d2              LSLS     r2,r2,#27
00002e  4311              ORRS     r1,r1,r2
000030  6001              STR      r1,[r0,#0]
;;;485    		 
;;;486    		// Start Timer0	
;;;487    		TIMER0->CTL |= TIMER_CTL_CNTEN_Msk;	
000032  6801              LDR      r1,[r0,#0]
000034  0382              LSLS     r2,r0,#14
000036  4311              ORRS     r1,r1,r2
000038  6001              STR      r1,[r0,#0]
;;;488    }
00003a  bd10              POP      {r4,pc}
;;;489    
                          ENDP

                  |L21.60|
                          DCD      0x48d00002
                  |L21.64|
                          DCD      0x40010000

                          AREA ||i.Timer1_Init||, CODE, READONLY, ALIGN=2

                  Timer1_Init PROC
;;;490    /* Timer1 initialize as periodic function */
;;;491    void Timer1_Init(void)
000000  b510              PUSH     {r4,lr}
;;;492    {
;;;493    		/* Enable IP clock */
;;;494    		CLK_EnableModuleClock(TMR1_MODULE);
000002  4c0b              LDR      r4,|L22.48|
000004  4620              MOV      r0,r4
000006  f7fffffe          BL       CLK_EnableModuleClock
;;;495    
;;;496    		/* Select IP clock source */
;;;497    		CLK_SetModuleClock(TMR1_MODULE, CLK_TMR1_SRC_HIRC, 0);
00000a  2107              MOVS     r1,#7
00000c  2200              MOVS     r2,#0
00000e  0309              LSLS     r1,r1,#12
000010  4620              MOV      r0,r4
000012  f7fffffe          BL       CLK_SetModuleClock
;;;498    		
;;;499    		/* Timer1 Prescale to 1MHz */
;;;500    		TIMER1-> CTL &= ~TIMER_CTL_PSC_Msk;
000016  4807              LDR      r0,|L22.52|
000018  6a01              LDR      r1,[r0,#0x20]
00001a  0a09              LSRS     r1,r1,#8
00001c  0209              LSLS     r1,r1,#8
00001e  6201              STR      r1,[r0,#0x20]
;;;501    		TIMER1-> CTL |= 47;        // 48MHz/48 = 1MHz
000020  6a01              LDR      r1,[r0,#0x20]
000022  222f              MOVS     r2,#0x2f
000024  4311              ORRS     r1,r1,r2
000026  6201              STR      r1,[r0,#0x20]
;;;502    		
;;;503    		/* Timer1 set to one-shot mode */
;;;504    		TIMER1-> CTL |= TIMER_ONESHOT_MODE;
000028  6a01              LDR      r1,[r0,#0x20]
00002a  6201              STR      r1,[r0,#0x20]
;;;505    			
;;;506    		// Enable timer interrupt
;;;507    //		TIMER_EnableInt(TIMER1);
;;;508    //		NVIC_EnableIRQ(TMR1_IRQn);
;;;509    //		NVIC_SetPriority(TMR1_IRQn,1);	
;;;510    }
00002c  bd10              POP      {r4,pc}
;;;511    
                          ENDP

00002e  0000              DCW      0x0000
                  |L22.48|
                          DCD      0x48d80003
                  |L22.52|
                          DCD      0x40010000

                          AREA ||i.VSP_Update||, CODE, READONLY, ALIGN=2

                  VSP_Update PROC
;;;755    /* VSP Input Command */
;;;756    void VSP_Update(void)
000000  b5f0              PUSH     {r4-r7,lr}
;;;757    {
;;;758     /* if Input Frequency of VSP lower than 25Hz */
;;;759     #ifdef PWM_DIRECT_INPUT
;;;760     if(u32_CCAP_Undo_Counter<NO_PWM_INPUT_COUNT)
;;;761     {
;;;762       /* CCAP transfer into command duty */
;;;763       u16_VSP_Command_Temp = (u32_CCAP_HighDuty<<12)/u32_CCAP_PulseWidth;	 
;;;764     }	 
;;;765     else
;;;766     {
;;;767       if(PC2)
;;;768    	 u16_VSP_Command_Temp = 4095;
;;;769       else		
;;;770    	 u16_VSP_Command_Temp = 0;
;;;771     } 
;;;772     #else
;;;773     #endif
;;;774     
;;;775     /* VSP Low-pass Filter */
;;;776     u16_VSP_Command_Input = (u16_VSP_Command_Input*3 + u16_VSP_Command_Temp)>>2; 
000002  485a              LDR      r0,|L23.364|
000004  6b01              LDR      r1,[r0,#0x30]  ; u16_VSP_Command_Input
000006  004a              LSLS     r2,r1,#1
000008  1889              ADDS     r1,r1,r2
00000a  6a82              LDR      r2,[r0,#0x28]  ; u16_VSP_Command_Temp
00000c  1889              ADDS     r1,r1,r2
00000e  0889              LSRS     r1,r1,#2
;;;777     
;;;778     /* Give vale for u16_VSP_Command_Input for judgement startup */
;;;779     if(u8_Hall_SW_Flag) 
000010  6301              STR      r1,[r0,#0x30]  ; u16_VSP_Command_Input
000012  7944              LDRB     r4,[r0,#5]  ; u8_Hall_SW_Flag
000014  2c00              CMP      r4,#0
000016  d001              BEQ      |L23.28|
;;;780    	 u16_VSP_Command_Temp = u16_VSP_Command_Input;
000018  6281              STR      r1,[r0,#0x28]  ; u16_VSP_Command_Temp
00001a  e001              B        |L23.32|
                  |L23.28|
;;;781     else 
;;;782    	 u16_VSP_Command_Temp = STARTUP;
00001c  22c8              MOVS     r2,#0xc8
00001e  6282              STR      r2,[r0,#0x28]  ; u16_VSP_Command_Temp
                  |L23.32|
;;;783     
;;;784     u16_VSP_Command = (u16_VSP_Command*3 + u16_VSP_Command_Temp)>>2;
000020  6ac2              LDR      r2,[r0,#0x2c]  ; u16_VSP_Command
000022  0053              LSLS     r3,r2,#1
000024  18d2              ADDS     r2,r2,r3
000026  6a83              LDR      r3,[r0,#0x28]  ; u16_VSP_Command_Temp
000028  18d2              ADDS     r2,r2,r3
00002a  0892              LSRS     r2,r2,#2
00002c  2300              MOVS     r3,#0
;;;785     
;;;786     /* Motor Stop Flag */
;;;787     if(u16_VSP_Command_Input<STOP_DUTY) 
00002e  62c2              STR      r2,[r0,#0x2c]  ; u16_VSP_Command
000030  2950              CMP      r1,#0x50
000032  d202              BCS      |L23.58|
;;;788    	 u8_Command_Stop_Flag = 1;
000034  2101              MOVS     r1,#1
000036  7081              STRB     r1,[r0,#2]
000038  e000              B        |L23.60|
                  |L23.58|
;;;789     else 
;;;790    	 u8_Command_Stop_Flag = 0;
00003a  7083              STRB     r3,[r0,#2]
                  |L23.60|
;;;791       
;;;792    /* DC Bus Current Limitation */
;;;793     u32_DCBusCurrent = u32_DCBusCurrent_Old + (0x3FFF*(signed int)(u16_ADC_DCBusCurrent_Temp - u32_DCBusCurrent_Old)>>15);
00003c  4f4b              LDR      r7,|L23.364|
00003e  6e45              LDR      r5,[r0,#0x64]  ; u32_DCBusCurrent_Old
000040  3780              ADDS     r7,r7,#0x80
000042  6839              LDR      r1,[r7,#0]  ; u16_ADC_DCBusCurrent_Temp
000044  1b49              SUBS     r1,r1,r5
000046  038e              LSLS     r6,r1,#14
000048  1a71              SUBS     r1,r6,r1
00004a  13c9              ASRS     r1,r1,#15
00004c  1949              ADDS     r1,r1,r5
;;;794     u32_DCBusCurrent_Old = u32_DCBusCurrent;
00004e  6601              STR      r1,[r0,#0x60]  ; u32_DCBusCurrent
;;;795     
;;;796    if(u32_DCBusCurrent<(LIMITED_DC_CURRENT+u16_ADC_DCBusCurrent_Offset))
000050  6641              STR      r1,[r0,#0x64]  ; u32_DCBusCurrent_Old
000052  267d              MOVS     r6,#0x7d
000054  697d              LDR      r5,[r7,#0x14]  ; u16_ADC_DCBusCurrent_Offset
000056  00f6              LSLS     r6,r6,#3
000058  19ad              ADDS     r5,r5,r6
00005a  42a9              CMP      r1,r5
00005c  d27b              BCS      |L23.342|
;;;797    { 
;;;798     /* Decide DutyCommand come from VSP or Speed */
;;;799     #ifdef SPEED_CONTROL_MODE
;;;800      /* Command Speed Increase or Decease Loop */  	   
;;;801      if(u8_Hall_SW_Flag)
;;;802      {		
;;;803       if(u8_Speed_Loop_Counter>=SPEED_ACCEL)
;;;804       {
;;;805    	  u8_Speed_Loop_Counter = 0;
;;;806        /* Speed Loop with Kp & Ki*/	
;;;807    		u16_SpeedCommand_Ref = (FULL_SPEED*u16_VSP_Command)>>12;
;;;808    		if(u16_SpeedCommand_Ref>MAX_SPEED) u16_SpeedCommand_Ref = MAX_SPEED;
;;;809    		if(u16_SpeedCommand_Ref<MIN_SPEED) u16_SpeedCommand_Ref = MIN_SPEED;
;;;810    	  u16_SpeedCommand_Error = u16_SpeedCommand_Ref - u16_SpeedCommand;
;;;811    		if(u16_SpeedCommand_Error<=-(u16_SpeedCommand>>1)) u16_SpeedCommand_Error = -(u16_SpeedCommand>>1);
;;;812    //		if((u16_SpeedCommand_Error<=50)&&(u16_SpeedCommand_Error>=-50)) LED = 0;
;;;813    //		else                                                            LED = 1;
;;;814        u16_SpeedCommand_Kp_Gain = (u16_SpeedCommand_Error*SPEED_KP)>>8;
;;;815    		if(u16_SpeedCommand_Kp_Gain>4095) u16_SpeedCommand_Kp_Gain = 4095;
00005e  4944              LDR      r1,|L23.368|
000060  2c00              CMP      r4,#0                 ;801
000062  d044              BEQ      |L23.238|
000064  7904              LDRB     r4,[r0,#4]            ;803  ; u8_Speed_Loop_Counter
000066  2c03              CMP      r4,#3                 ;803
000068  d201              BCS      |L23.110|
;;;816    		if(u16_SpeedCommand_Kp_Gain<-128) u16_SpeedCommand_Kp_Gain = -128;
;;;817        u16_SpeedCommand_Ki_Gain = (u16_SpeedCommand_Error*SPEED_KI)>>8;		
;;;818    		if(u16_SpeedCommand_Ki_Gain>2048) u16_SpeedCommand_Ki_Gain = 2048;
;;;819    		if(u16_SpeedCommand_Ki_Gain<-128) u16_SpeedCommand_Ki_Gain = -128;
;;;820        u16_SpeedCommand_Ki_Sum  =  u16_SpeedCommand_Ki_Sum + u16_SpeedCommand_Ki_Gain;
;;;821    		if(u16_SpeedCommand_Ki_Sum>4095) u16_SpeedCommand_Ki_Sum = 4095;
;;;822    		if(u16_SpeedCommand_Ki_Sum<-128) u16_SpeedCommand_Ki_Sum = -128;		
;;;823        u16_DutyCommand_Ref      =  u16_SpeedCommand_Kp_Gain + u16_SpeedCommand_Ki_Sum;	
;;;824       }
;;;825      }	
;;;826    	else
;;;827    	u16_DutyCommand_Ref = u16_VSP_Command;
00006a  6b82              LDR      r2,[r0,#0x38]  ; u16_DutyCommand_Ref
00006c  e040              B        |L23.240|
                  |L23.110|
00006e  247d              MOVS     r4,#0x7d              ;807
000070  01e4              LSLS     r4,r4,#7              ;807
000072  4362              MULS     r2,r4,r2              ;807
000074  0b12              LSRS     r2,r2,#12             ;807
000076  7103              STRB     r3,[r0,#4]            ;805
000078  6442              STR      r2,[r0,#0x44]         ;808  ; u16_SpeedCommand_Ref
00007a  42a2              CMP      r2,r4                 ;808
00007c  dc03              BGT      |L23.134|
00007e  2419              MOVS     r4,#0x19              ;809
000080  01a4              LSLS     r4,r4,#6              ;809
000082  42a2              CMP      r2,r4                 ;809
000084  da00              BGE      |L23.136|
                  |L23.134|
000086  6444              STR      r4,[r0,#0x44]         ;808  ; u16_SpeedCommand_Ref
                  |L23.136|
000088  6c04              LDR      r4,[r0,#0x40]         ;810  ; u16_SpeedCommand
00008a  6c42              LDR      r2,[r0,#0x44]         ;810  ; u16_SpeedCommand_Ref
00008c  1b12              SUBS     r2,r2,r4              ;810
00008e  1064              ASRS     r4,r4,#1              ;811
000090  4264              RSBS     r4,r4,#0              ;811
000092  6482              STR      r2,[r0,#0x48]         ;811  ; u16_SpeedCommand_Error
000094  4294              CMP      r4,r2                 ;811
000096  da01              BGE      |L23.156|
000098  4614              MOV      r4,r2                 ;814
00009a  e000              B        |L23.158|
                  |L23.156|
00009c  6484              STR      r4,[r0,#0x48]         ;811  ; u16_SpeedCommand_Error
                  |L23.158|
00009e  0162              LSLS     r2,r4,#5              ;814
0000a0  1b12              SUBS     r2,r2,r4              ;814
0000a2  1215              ASRS     r5,r2,#8              ;814
0000a4  227f              MOVS     r2,#0x7f              ;816
0000a6  43d2              MVNS     r2,r2                 ;816
0000a8  64c5              STR      r5,[r0,#0x4c]         ;815  ; u16_SpeedCommand_Kp_Gain
0000aa  428d              CMP      r5,r1                 ;815
0000ac  dd01              BLE      |L23.178|
0000ae  64c1              STR      r1,[r0,#0x4c]         ;815  ; u16_SpeedCommand_Kp_Gain
0000b0  e002              B        |L23.184|
                  |L23.178|
0000b2  4295              CMP      r5,r2                 ;816
0000b4  da00              BGE      |L23.184|
0000b6  64c2              STR      r2,[r0,#0x4c]         ;816  ; u16_SpeedCommand_Kp_Gain
                  |L23.184|
0000b8  0065              LSLS     r5,r4,#1              ;817
0000ba  1964              ADDS     r4,r4,r5              ;817
0000bc  1224              ASRS     r4,r4,#8              ;817
0000be  2501              MOVS     r5,#1                 ;818
0000c0  02ed              LSLS     r5,r5,#11             ;818
0000c2  6504              STR      r4,[r0,#0x50]         ;818  ; u16_SpeedCommand_Ki_Gain
0000c4  42ac              CMP      r4,r5                 ;818
0000c6  dd01              BLE      |L23.204|
0000c8  6505              STR      r5,[r0,#0x50]         ;818  ; u16_SpeedCommand_Ki_Gain
0000ca  e002              B        |L23.210|
                  |L23.204|
0000cc  4294              CMP      r4,r2                 ;819
0000ce  da00              BGE      |L23.210|
0000d0  6502              STR      r2,[r0,#0x50]         ;819  ; u16_SpeedCommand_Ki_Gain
                  |L23.210|
0000d2  6d05              LDR      r5,[r0,#0x50]         ;820  ; u16_SpeedCommand_Ki_Gain
0000d4  6d44              LDR      r4,[r0,#0x54]         ;820  ; u16_SpeedCommand_Ki_Sum
0000d6  1964              ADDS     r4,r4,r5              ;820
0000d8  6544              STR      r4,[r0,#0x54]         ;821  ; u16_SpeedCommand_Ki_Sum
0000da  428c              CMP      r4,r1                 ;821
0000dc  dd01              BLE      |L23.226|
0000de  6541              STR      r1,[r0,#0x54]         ;821  ; u16_SpeedCommand_Ki_Sum
0000e0  e002              B        |L23.232|
                  |L23.226|
0000e2  4294              CMP      r4,r2                 ;822
0000e4  da00              BGE      |L23.232|
0000e6  6542              STR      r2,[r0,#0x54]         ;822  ; u16_SpeedCommand_Ki_Sum
                  |L23.232|
0000e8  6d44              LDR      r4,[r0,#0x54]         ;823  ; u16_SpeedCommand_Ki_Sum
0000ea  6cc2              LDR      r2,[r0,#0x4c]         ;823  ; u16_SpeedCommand_Kp_Gain
0000ec  1912              ADDS     r2,r2,r4              ;823
                  |L23.238|
0000ee  6382              STR      r2,[r0,#0x38]  ; u16_DutyCommand_Ref
                  |L23.240|
;;;828     #else  
;;;829    	u16_DutyCommand_Ref = u16_VSP_Command;
;;;830     #endif
;;;831    	
;;;832    	
;;;833     /* u16_DutyCommand_Ref Upper and Lower Limitation */ 	
;;;834     if(u16_DutyCommand_Ref>MAX_DUTY) u16_DutyCommand_Ref = MAX_DUTY;
;;;835     if(u16_DutyCommand_Ref<Min_DUTY) u16_DutyCommand_Ref = Min_DUTY;	
0000f0  25fa              MOVS     r5,#0xfa
0000f2  428a              CMP      r2,r1                 ;834
0000f4  dd01              BLE      |L23.250|
0000f6  6381              STR      r1,[r0,#0x38]         ;834  ; u16_DutyCommand_Ref
0000f8  e002              B        |L23.256|
                  |L23.250|
0000fa  2afa              CMP      r2,#0xfa
0000fc  da00              BGE      |L23.256|
0000fe  6385              STR      r5,[r0,#0x38]  ; u16_DutyCommand_Ref
                  |L23.256|
;;;836    	
;;;837     /* Command Duty Increase or Decrease Loop */
;;;838       if(u8_Duty_Loop_Counter>=DUTY_ACCEL)
000100  78c2              LDRB     r2,[r0,#3]  ; u8_Duty_Loop_Counter
000102  2a03              CMP      r2,#3
000104  d32a              BCC      |L23.348|
;;;839       { 
;;;840    		u8_Duty_Loop_Counter = 0;
000106  70c3              STRB     r3,[r0,#3]
;;;841        
;;;842    		#ifdef SPEED_CONTROL_MODE
;;;843        u8_Speed_Loop_Counter++;
000108  7902              LDRB     r2,[r0,#4]  ; u8_Speed_Loop_Counter
00010a  1c52              ADDS     r2,r2,#1
00010c  7102              STRB     r2,[r0,#4]
;;;844        #else
;;;845        #endif
;;;846    		 
;;;847    		/* Increase */		 
;;;848    		if(u16_DutyCommand_Ref>=u16_DutyCommand)
00010e  6b84              LDR      r4,[r0,#0x38]  ; u16_DutyCommand_Ref
000110  6b42              LDR      r2,[r0,#0x34]  ; u16_DutyCommand
000112  4294              CMP      r4,r2
000114  d311              BCC      |L23.314|
;;;849    		{
;;;850    		if(u16_DutyCommand_Ref>u16_DutyCommand)
000116  4294              CMP      r4,r2
000118  d908              BLS      |L23.300|
;;;851    		 u16_DutyCommand_Error = u16_DutyCommand_Ref - u16_DutyCommand ;
00011a  1aa3              SUBS     r3,r4,r2
;;;852    		else
;;;853    		 u16_DutyCommand_Error = 0;
;;;854    		if(u16_DutyCommand_Error>1) u16_DutyCommand_Error = u16_DutyCommand_Error>>1;
00011c  63c3              STR      r3,[r0,#0x3c]  ; u16_DutyCommand_Error
00011e  2b01              CMP      r3,#1
000120  d901              BLS      |L23.294|
000122  085b              LSRS     r3,r3,#1
000124  63c3              STR      r3,[r0,#0x3c]  ; u16_DutyCommand_Error
                  |L23.294|
;;;855    		if(u16_DutyCommand_Error>=MAX_ACCEL_DUTY) u16_DutyCommand_Error = MAX_ACCEL_DUTY;
000126  2b10              CMP      r3,#0x10
000128  d301              BCC      |L23.302|
00012a  2310              MOVS     r3,#0x10
                  |L23.300|
00012c  63c3              STR      r3,[r0,#0x3c]         ;853  ; u16_DutyCommand_Error
                  |L23.302|
;;;856    		u16_DutyCommand = u16_DutyCommand + u16_DutyCommand_Error;
00012e  18d2              ADDS     r2,r2,r3
;;;857    		if(u16_DutyCommand>=MAX_COMMAND) u16_DutyCommand = MAX_COMMAND;	
000130  6342              STR      r2,[r0,#0x34]  ; u16_DutyCommand
000132  428a              CMP      r2,r1
000134  d300              BCC      |L23.312|
                  |L23.310|
000136  6341              STR      r1,[r0,#0x34]  ; u16_DutyCommand
                  |L23.312|
;;;858    		}	
;;;859    		else 		/* Decrease */	
;;;860    		{
;;;861    		u16_DutyCommand_Error = u16_DutyCommand - u16_DutyCommand_Ref ; 
;;;862    		if(u16_DutyCommand_Error>1) u16_DutyCommand_Error = u16_DutyCommand_Error>>1;
;;;863    		if(u16_DutyCommand_Error>=MAX_DEACCEL_DUTY) u16_DutyCommand_Error = MAX_DEACCEL_DUTY;	 
;;;864    		if(	u16_DutyCommand > Min_DUTY) 	u16_DutyCommand = u16_DutyCommand - u16_DutyCommand_Error; 
;;;865    		else u16_DutyCommand = Min_DUTY;
;;;866    		}
;;;867    	 }		
;;;868       else u8_Duty_Loop_Counter++;
;;;869    }
;;;870    else
;;;871    {
;;;872     /* Limit Current */
;;;873     if(u16_DutyCommand>1)
;;;874      u16_DutyCommand = u16_DutyCommand-1;
;;;875    }	
;;;876     
;;;877    }
000138  bdf0              POP      {r4-r7,pc}
                  |L23.314|
00013a  1b11              SUBS     r1,r2,r4              ;861
00013c  63c1              STR      r1,[r0,#0x3c]         ;862  ; u16_DutyCommand_Error
00013e  2901              CMP      r1,#1                 ;862
000140  d901              BLS      |L23.326|
000142  0849              LSRS     r1,r1,#1              ;862
000144  63c1              STR      r1,[r0,#0x3c]         ;862  ; u16_DutyCommand_Error
                  |L23.326|
000146  2908              CMP      r1,#8                 ;863
000148  d301              BCC      |L23.334|
00014a  2108              MOVS     r1,#8                 ;863
00014c  63c1              STR      r1,[r0,#0x3c]         ;863  ; u16_DutyCommand_Error
                  |L23.334|
00014e  2afa              CMP      r2,#0xfa              ;864
000150  d902              BLS      |L23.344|
000152  1a51              SUBS     r1,r2,r1              ;864
000154  e7ef              B        |L23.310|
                  |L23.342|
000156  e004              B        |L23.354|
                  |L23.344|
000158  6345              STR      r5,[r0,#0x34]         ;865  ; u16_DutyCommand
00015a  bdf0              POP      {r4-r7,pc}
                  |L23.348|
00015c  1c52              ADDS     r2,r2,#1
00015e  70c2              STRB     r2,[r0,#3]            ;868
                  |L23.352|
000160  bdf0              POP      {r4-r7,pc}
                  |L23.354|
000162  6b41              LDR      r1,[r0,#0x34]         ;873  ; u16_DutyCommand
000164  2901              CMP      r1,#1                 ;873
000166  d9fb              BLS      |L23.352|
000168  1e49              SUBS     r1,r1,#1              ;873
00016a  e7e4              B        |L23.310|
;;;878    
                          ENDP

                  |L23.364|
                          DCD      ||.data||
                  |L23.368|
                          DCD      0x00000fff

                          AREA ||i.main||, CODE, READONLY, ALIGN=2

                  main PROC
;;;511    
;;;512    int main()
000000  f7fffffe          BL       Motor_Start
;;;513    {	
;;;514    		unsigned int i;		
;;;515    		unsigned int j;
;;;516    		/* Initialize at begining */
;;;517    		Motor_Start();
;;;518    		u8_Command_Stop_Flag = 1;
000004  482b              LDR      r0,|L24.180|
000006  2101              MOVS     r1,#1
000008  7081              STRB     r1,[r0,#2]
;;;519    		u8_Motor_State = MOTOR_STOP;
00000a  2100              MOVS     r1,#0
00000c  71c1              STRB     r1,[r0,#7]
;;;520    		
;;;521    		/* Initialize all register setting*/	
;;;522    		SYS_Init();	
00000e  f7fffffe          BL       SYS_Init
;;;523    		EADC_Init();
000012  f7fffffe          BL       EADC_Init
;;;524    		PGA_Init();
000016  f7fffffe          BL       PGA_Init
;;;525    		GPIO_Init();
00001a  f7fffffe          BL       GPIO_Init
;;;526        ECAP_Init();	
00001e  f7fffffe          BL       ECAP_Init
;;;527    		Timer0_Init();
000022  f7fffffe          BL       Timer0_Init
;;;528    //		Timer1_Init();
;;;529    		
;;;530    	  #ifdef PWM_DIRECT_INPUT
;;;531    	  CCAP_Init();
;;;532    	  #else
;;;533    	  #endif
;;;534    		EPWM_Init();	
000026  f7fffffe          BL       EPWM_Init
;;;535    		
;;;536    	  /* Delay wait PGA output stable for DCBUS Offset Current detection*/
;;;537    		for(j=0; j<100000; j++);
00002a  4923              LDR      r1,|L24.184|
00002c  2000              MOVS     r0,#0
                  |L24.46|
00002e  1c40              ADDS     r0,r0,#1
000030  4288              CMP      r0,r1
000032  d3fc              BCC      |L24.46|
;;;538    
;;;539    		/* Detect DCBUS Offset Current */
;;;540    		u16_ADC_DCBusCurrent_Offset_Temp1 = ADC_DCBusCurrent();
000034  f7fffffe          BL       ADC_DCBusCurrent
000038  4c1e              LDR      r4,|L24.180|
00003a  3480              ADDS     r4,r4,#0x80
;;;541    		u16_ADC_DCBusCurrent_Offset_Temp2 = ADC_DCBusCurrent();
00003c  6060              STR      r0,[r4,#4]  ; u16_ADC_DCBusCurrent_Offset_Temp1
00003e  f7fffffe          BL       ADC_DCBusCurrent
;;;542    		u16_ADC_DCBusCurrent_Offset_Temp3 = ADC_DCBusCurrent();
000042  60a0              STR      r0,[r4,#8]  ; u16_ADC_DCBusCurrent_Offset_Temp2
000044  f7fffffe          BL       ADC_DCBusCurrent
;;;543    		u16_ADC_DCBusCurrent_Offset_Temp4 = ADC_DCBusCurrent();	
000048  60e0              STR      r0,[r4,#0xc]  ; u16_ADC_DCBusCurrent_Offset_Temp3
00004a  f7fffffe          BL       ADC_DCBusCurrent
;;;544    		u16_ADC_DCBusCurrent_Offset = (u16_ADC_DCBusCurrent_Offset_Temp1 + u16_ADC_DCBusCurrent_Offset_Temp2 + u16_ADC_DCBusCurrent_Offset_Temp3 + u16_ADC_DCBusCurrent_Offset_Temp4)>>2;	
00004e  6120              STR      r0,[r4,#0x10]  ; u16_ADC_DCBusCurrent_Offset_Temp4
000050  68a2              LDR      r2,[r4,#8]  ; u16_ADC_DCBusCurrent_Offset_Temp2
000052  6861              LDR      r1,[r4,#4]  ; u16_ADC_DCBusCurrent_Offset_Temp1
;;;545    	
;;;546    	//Loop through and start all of the timers
;;;547      for(i = 0; i <  dNumScheduledFunctions; i++)
;;;548    	{
;;;549    		CoreTimerLibTimerStart01(&m_MainStatus.tSSchedulerItemTimer[i], tsScheduleTable[i].wIntervalSeconds, tsScheduleTable[i].wIntervalMilliseconds);
000054  4d19              LDR      r5,|L24.188|
000056  1889              ADDS     r1,r1,r2              ;544
000058  68e2              LDR      r2,[r4,#0xc]          ;544  ; u16_ADC_DCBusCurrent_Offset_Temp3
00005a  1889              ADDS     r1,r1,r2              ;544
00005c  1808              ADDS     r0,r1,r0              ;544
00005e  0880              LSRS     r0,r0,#2              ;544
000060  6160              STR      r0,[r4,#0x14]         ;547  ; u16_ADC_DCBusCurrent_Offset
000062  2400              MOVS     r4,#0                 ;547
                  |L24.100|
000064  4620              MOV      r0,r4
000066  210c              MOVS     r1,#0xc
000068  4348              MULS     r0,r1,r0
00006a  4912              LDR      r1,|L24.180|
00006c  3198              ADDS     r1,r1,#0x98
00006e  1842              ADDS     r2,r0,r1
000070  5809              LDR      r1,[r1,r0]
000072  6852              LDR      r2,[r2,#4]
000074  1940              ADDS     r0,r0,r5
000076  f7fffffe          BL       CoreTimerLibTimerStart01
00007a  1c64              ADDS     r4,r4,#1
00007c  2c02              CMP      r4,#2                 ;547
00007e  d3f1              BCC      |L24.100|
                  |L24.128|
;;;550    	}	
;;;551    	while(1)
;;;552    	{
;;;553    		for(i = 0; i <  dNumScheduledFunctions; i++)
000080  2400              MOVS     r4,#0
                  |L24.130|
;;;554    			{
;;;555    				////Check the timer to see if it is expired
;;;556    				if (CoreTimerLibIsTimerExpired(&m_MainStatus.tSSchedulerItemTimer[i]))
000082  200c              MOVS     r0,#0xc
000084  4625              MOV      r5,r4
000086  4345              MULS     r5,r0,r5
000088  480c              LDR      r0,|L24.188|
00008a  1828              ADDS     r0,r5,r0
00008c  4607              MOV      r7,r0
00008e  f7fffffe          BL       CoreTimerLibIsTimerExpired
000092  2800              CMP      r0,#0
000094  d009              BEQ      |L24.170|
;;;557    				{
;;;558    
;;;559    					//Restart the timer -- the time is measured from the start of the
;;;560    					//function to the start of the next time it is called
;;;561    					CoreTimerLibTimerStart01(&m_MainStatus.tSSchedulerItemTimer[i], tsScheduleTable[i].wIntervalSeconds, tsScheduleTable[i].wIntervalMilliseconds);				
000096  4807              LDR      r0,|L24.180|
000098  3098              ADDS     r0,r0,#0x98
00009a  182e              ADDS     r6,r5,r0
00009c  5941              LDR      r1,[r0,r5]
00009e  4638              MOV      r0,r7
0000a0  6872              LDR      r2,[r6,#4]
0000a2  f7fffffe          BL       CoreTimerLibTimerStart01
;;;562    				
;;;563    					//Finally, call the function
;;;564    					tsScheduleTable[i].pfScheduledFunction();
0000a6  68b0              LDR      r0,[r6,#8]
0000a8  4780              BLX      r0
                  |L24.170|
0000aa  1c64              ADDS     r4,r4,#1
0000ac  2c02              CMP      r4,#2                 ;553
0000ae  d3e8              BCC      |L24.130|
0000b0  e7e6              B        |L24.128|
;;;565    				} 
;;;566    			}	
;;;567    	}
;;;568    }
;;;569    
                          ENDP

0000b2  0000              DCW      0x0000
                  |L24.180|
                          DCD      ||.data||
                  |L24.184|
                          DCD      0x000186a0
                  |L24.188|
                          DCD      ||.bss||

                          AREA ||.bss||, DATA, NOINIT, ALIGN=2

                  m_MainStatus
                          %        24

                          AREA ||.data||, DATA, ALIGN=2

                  u8_CCAP_First_Flag
000000  00                DCB      0x00
                  u8_StopMotor_Flag
000001  00                DCB      0x00
                  u8_Command_Stop_Flag
000002  00                DCB      0x00
                  u8_Duty_Loop_Counter
000003  00                DCB      0x00
                  u8_Speed_Loop_Counter
000004  00                DCB      0x00
                  u8_Hall_SW_Flag
000005  00                DCB      0x00
                  u8_Hall_SW_Counter
000006  00                DCB      0x00
                  u8_Motor_State
000007  00                DCB      0x00
                  u8_Lock_Detection_Flag
000008  00                DCB      0x00
                  u8_HallState
000009  00                DCB      0x00
                  u8_ClockWise
00000a  00                DCB      0x00
                  u8_SpeedComputation_Flag
00000b  00                DCB      0x00
                  u16_Duty0
                          DCD      0x00000000
                  u16_Duty1
                          DCD      0x00000000
                  u32_CCAP_Rising_Old
                          DCD      0x00000000
                  u32_CCAP_Falling_Old
                          DCD      0x00000000
                  u32_CCAP_HighDuty
                          DCD      0x00000000
                  u32_CCAP_PulseWidth
                          DCD      0x00000000
                  u32_CCAP_Undo_Counter
                          DCD      0x00000000
                  u16_VSP_Command_Temp
                          DCD      0x00000000
                  u16_VSP_Command
                          DCD      0x00000000
                  u16_VSP_Command_Input
                          DCD      0x00000000
                  u16_DutyCommand
                          DCD      0x00000000
                  u16_DutyCommand_Ref
                          DCD      0x00000000
                  u16_DutyCommand_Error
                          DCD      0x00000000
                  u16_SpeedCommand
                          DCD      0x00000000
                  u16_SpeedCommand_Ref
                          DCD      0x00000000
                  u16_SpeedCommand_Error
                          DCD      0x00000000
                  u16_SpeedCommand_Kp_Gain
                          DCD      0x00000000
                  u16_SpeedCommand_Ki_Gain
                          DCD      0x00000000
                  u16_SpeedCommand_Ki_Sum
                          DCD      0x00000000
                  u32_Lock_Detection_Counter
                          DCD      0x00000000
                  u32_Lock_Release_Counter
                          DCD      0x00000000
                  u32_DCBusCurrent
                          DCD      0x00000000
                  u32_DCBusCurrent_Old
                          DCD      0x00000000
                  u32_ECAP_HOLD
                          DCD      0x00000000
                  u32_Speed_Period
                          DCD      0x00000000
                  u32_Eletric_Spd_Avg
                          DCD      0x00000000
                  u32_Mechanical_Spd
                          DCD      0x00000000
                  u32_Mechanical_Spd_Avg
                          DCD      0x00000000
                  u32_Angle_remaind2
                          DCD      0x00000000
                  u16_ADC_DCBusCurrent_Temp
                          DCD      0x00000000
                  u16_ADC_DCBusCurrent_Offset_Temp1
                          DCD      0x00000000
                  u16_ADC_DCBusCurrent_Offset_Temp2
                          DCD      0x00000000
                  u16_ADC_DCBusCurrent_Offset_Temp3
                          DCD      0x00000000
                  u16_ADC_DCBusCurrent_Offset_Temp4
                          DCD      0x00000000
                  u16_ADC_DCBusCurrent_Offset
                          DCD      0x00000000
                  tsScheduleTable
                          DCD      0x00000000
                          DCD      0x00000028
                          DCD      VSP_Update
                          DCD      0x00000000
                          DCD      0x00000032
                          DCD      Motor_State_Update

                          AREA ||area_number.29||, DATA, ALIGN=0

                          EXPORTAS ||area_number.29||, ||.data||
                  u8_Single_Commutation_State
000000  00                DCB      0x00

                          AREA ||area_number.30||, DATA, ALIGN=0

                          EXPORTAS ||area_number.30||, ||.data||
                  u8_Clockwise_Flag
000000  00                DCB      0x00

                          AREA ||area_number.31||, DATA, ALIGN=2

                          EXPORTAS ||area_number.31||, ||.data||
                  u16_FG_Count
                          DCD      0x00000000

                          AREA ||area_number.32||, DATA, ALIGN=2

                          EXPORTAS ||area_number.32||, ||.data||
                  u16_ADC_BEMFV
                          DCD      0x00000000

                          AREA ||area_number.33||, DATA, ALIGN=2

                          EXPORTAS ||area_number.33||, ||.data||
                  u16_ADC_BEMFW
                          DCD      0x00000000

                          AREA ||area_number.34||, DATA, ALIGN=2

                          EXPORTAS ||area_number.34||, ||.data||
                  u16_ADC_BEMFV_Old
                          DCD      0x00000000

                          AREA ||area_number.35||, DATA, ALIGN=2

                          EXPORTAS ||area_number.35||, ||.data||
                  u16_ADC_BEMFW_Old
                          DCD      0x00000000

                          AREA ||area_number.36||, DATA, ALIGN=2

                          EXPORTAS ||area_number.36||, ||.data||
                  u32_CCAP_LowDuty
                          DCD      0x00000000

                          AREA ||area_number.37||, DATA, ALIGN=2

                          EXPORTAS ||area_number.37||, ||.data||
                  u32_CCAP_Duty
                          DCD      0x00000000

                          AREA ||area_number.38||, DATA, ALIGN=0

                          EXPORTAS ||area_number.38||, ||.data||
                  u8_SinTable_Flag
000000  00                DCB      0x00

                          AREA ||area_number.39||, DATA, ALIGN=0

                          EXPORTAS ||area_number.39||, ||.data||
                  u8_Sin_Ratio1
000000  00                DCB      0x00

                          AREA ||area_number.40||, DATA, ALIGN=0

                          EXPORTAS ||area_number.40||, ||.data||
                  u8_Sin_Ratio2
000000  00                DCB      0x00

                          AREA ||area_number.41||, DATA, ALIGN=2

                          EXPORTAS ||area_number.41||, ||.data||
                  u16_Timer1_Cmp_Delay
                          DCD      0x00000000

                          AREA ||area_number.42||, DATA, ALIGN=2

                          EXPORTAS ||area_number.42||, ||.data||
                  u32_ECAP_HOLD0_RISING
                          DCD      0x00000000

                          AREA ||area_number.43||, DATA, ALIGN=2

                          EXPORTAS ||area_number.43||, ||.data||
                  u32_ECAP_HOLD0_FALLING
                          DCD      0x00000000

                          AREA ||area_number.44||, DATA, ALIGN=2

                          EXPORTAS ||area_number.44||, ||.data||
                  u32_ECAP_HOLD1_RISING
                          DCD      0x00000000

                          AREA ||area_number.45||, DATA, ALIGN=2

                          EXPORTAS ||area_number.45||, ||.data||
                  u32_ECAP_HOLD1_FALLING
                          DCD      0x00000000

                          AREA ||area_number.46||, DATA, ALIGN=2

                          EXPORTAS ||area_number.46||, ||.data||
                  u32_ECAP_HOLD2_RISING
                          DCD      0x00000000

                          AREA ||area_number.47||, DATA, ALIGN=2

                          EXPORTAS ||area_number.47||, ||.data||
                  u32_ECAP_HOLD2_FALLING
                          DCD      0x00000000

                          AREA ||area_number.48||, DATA, ALIGN=2

                          EXPORTAS ||area_number.48||, ||.data||
                  u32_Timer0_Period
                          DCD      0x00000000

                          AREA ||area_number.49||, DATA, ALIGN=2

                          EXPORTAS ||area_number.49||, ||.data||
                  u32_Timer0_Period1
                          DCD      0x00000000

                          AREA ||area_number.50||, DATA, ALIGN=2

                          EXPORTAS ||area_number.50||, ||.data||
                  u32_Timer0_Period2
                          DCD      0x00000000

                          AREA ||area_number.51||, DATA, ALIGN=2

                          EXPORTAS ||area_number.51||, ||.data||
                  u32_Timer0_Counter
                          DCD      0x00000000

                          AREA ||area_number.52||, DATA, ALIGN=2

                          EXPORTAS ||area_number.52||, ||.data||
                  u32_Timer0_Counter_Old
                          DCD      0x00000000

                          AREA ||area_number.53||, DATA, ALIGN=2

                          EXPORTAS ||area_number.53||, ||.data||
                  u32_Eletric_Spd
                          DCD      0x00000000

                          AREA ||area_number.54||, DATA, ALIGN=2

                          EXPORTAS ||area_number.54||, ||.data||
                  u32_Angle_remaind1
                          DCD      0x00000000

                          AREA ||area_number.55||, DATA, ALIGN=2

                          EXPORTAS ||area_number.55||, ||.data||
                  u16_ADC_Command_Temp
                          DCD      0x00000000

                          AREA ||area_number.56||, DATA, ALIGN=2

                          EXPORTAS ||area_number.56||, ||.data||
                  u16_ADC_BEMFV_Temp
                          DCD      0x00000000

                          AREA ||area_number.57||, DATA, ALIGN=2

                          EXPORTAS ||area_number.57||, ||.data||
                  u16_ADC_BEMFW_Temp
                          DCD      0x00000000

                          AREA ||area_number.58||, DATA, ALIGN=2

                          EXPORTAS ||area_number.58||, ||.data||
                  u16_ADC_Prometer_Temp
                          DCD      0x00000000

                          AREA ||area_number.59||, DATA, ALIGN=2

                          EXPORTAS ||area_number.59||, ||.data||
                  u16_ADC_DCBusVoltage_Temp
                          DCD      0x00000000

                          AREA ||i.__ARM_common_switch8||, COMGROUP=__ARM_common_switch8, CODE, READONLY, ALIGN=1

                  __ARM_common_switch8 PROC
000000  b430              PUSH     {r4,r5}
000002  4674              MOV      r4,lr
000004  1e64              SUBS     r4,r4,#1
000006  7825              LDRB     r5,[r4,#0]
000008  1c64              ADDS     r4,r4,#1
00000a  42ab              CMP      r3,r5
00000c  d200              BCS      |L182.16|
00000e  461d              MOV      r5,r3
                  |L182.16|
000010  5d63              LDRB     r3,[r4,r5]
000012  005b              LSLS     r3,r3,#1
000014  18e3              ADDS     r3,r4,r3
000016  bc30              POP      {r4,r5}
000018  4718              BX       r3
                          ENDP


;*** Start embedded assembler ***

#line 1 "..\\main.c"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___6_main_c_SYS_Init____REV16|
#line 118 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cmInstr.h"
|__asm___6_main_c_SYS_Init____REV16| PROC
#line 119

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___6_main_c_SYS_Init____REVSH|
#line 132
|__asm___6_main_c_SYS_Init____REVSH| PROC
#line 133

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***

                  __ARM_use_no_argv EQU 0
