; generated by Component: ARM Compiler 5.04 update 1 (build 49) Tool: ArmCC [5040049]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\obj\timer.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\timer.d --cpu=Cortex-M0 --apcs=interwork -I..\..\..\..\Library\CMSIS\Include -I..\..\..\..\Library\Device\Nuvoton\NM1120\Include -I..\..\..\..\Library\StdDriver\inc -I.\source -IC:\Keil_v5\ARM\RV31\INC -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\3.20.4\CMSIS\Include -D__MICROLIB --omf_browse=.\obj\timer.crf ..\..\..\..\Library\StdDriver\src\timer.c]
                          THUMB

                          AREA ||i.TIMER_Close||, CODE, READONLY, ALIGN=1

                  TIMER_Close PROC
;;;74       */
;;;75     void TIMER_Close(TIMER_T *timer)
000000  2100              MOVS     r1,#0
;;;76     {
;;;77         timer->CTL = 0;
000002  6001              STR      r1,[r0,#0]
;;;78         timer->EXTCTL = 0;
000004  6141              STR      r1,[r0,#0x14]
;;;79     
;;;80     }
000006  4770              BX       lr
;;;81     
                          ENDP


                          AREA ||i.TIMER_Delay||, CODE, READONLY, ALIGN=2

                  TIMER_Delay PROC
;;;89       */
;;;90     void TIMER_Delay(TIMER_T *timer, uint32_t u32Usec)
000000  b5f3              PUSH     {r0,r1,r4-r7,lr}
;;;91     {
000002  b081              SUB      sp,sp,#4
000004  4605              MOV      r5,r0
;;;92         uint32_t u32Clk = TIMER_GetModuleClock(timer);
000006  f7fffffe          BL       TIMER_GetModuleClock
00000a  4607              MOV      r7,r0
;;;93         uint32_t u32Prescale = 0, delay = SystemCoreClock / u32Clk + 1;
00000c  4601              MOV      r1,r0
00000e  4827              LDR      r0,|L2.172|
000010  2600              MOVS     r6,#0
000012  6800              LDR      r0,[r0,#0]  ; SystemCoreClock
000014  f7fffffe          BL       __aeabi_uidivmod
000018  1c44              ADDS     r4,r0,#1
;;;94         double fCmpr;
;;;95     
;;;96         // Clear current timer configuration
;;;97         timer->CTL = 0;
00001a  2000              MOVS     r0,#0
00001c  6028              STR      r0,[r5,#0]
;;;98         timer->EXTCTL = 0;
00001e  6168              STR      r0,[r5,#0x14]
;;;99     
;;;100        if(u32Clk == 10000) {         // min delay is 100us if timer clock source is LIRC 10k
000020  4823              LDR      r0,|L2.176|
000022  4287              CMP      r7,r0
000024  d106              BNE      |L2.52|
;;;101            u32Usec = ((u32Usec + 99) / 100) * 100;
000026  9802              LDR      r0,[sp,#8]
000028  2164              MOVS     r1,#0x64
00002a  3063              ADDS     r0,r0,#0x63
00002c  f7fffffe          BL       __aeabi_uidivmod
000030  2164              MOVS     r1,#0x64
000032  e005              B        |L2.64|
                  |L2.52|
;;;102        } else {    // 10 usec every step
;;;103            u32Usec = ((u32Usec + 9) / 10) * 10;
000034  9802              LDR      r0,[sp,#8]
000036  210a              MOVS     r1,#0xa
000038  3009              ADDS     r0,r0,#9
00003a  f7fffffe          BL       __aeabi_uidivmod
00003e  210a              MOVS     r1,#0xa
                  |L2.64|
000040  4348              MULS     r0,r1,r0
;;;104        }
;;;105    
;;;106        if(u32Clk >= 0x4000000) {
000042  9002              STR      r0,[sp,#8]
000044  2001              MOVS     r0,#1
000046  0680              LSLS     r0,r0,#26
000048  4287              CMP      r7,r0
00004a  d302              BCC      |L2.82|
;;;107            u32Prescale = 7;    // real prescaler value is 8
00004c  2607              MOVS     r6,#7
;;;108            u32Clk >>= 3;
00004e  08ff              LSRS     r7,r7,#3
000050  e00c              B        |L2.108|
                  |L2.82|
;;;109        } else if(u32Clk >= 0x2000000) {
000052  2001              MOVS     r0,#1
000054  0640              LSLS     r0,r0,#25
000056  4287              CMP      r7,r0
000058  d302              BCC      |L2.96|
;;;110            u32Prescale = 3;    // real prescaler value is 4
00005a  2603              MOVS     r6,#3
;;;111            u32Clk >>= 2;
00005c  08bf              LSRS     r7,r7,#2
00005e  e005              B        |L2.108|
                  |L2.96|
;;;112        } else if(u32Clk >= 0x1000000) {
000060  2001              MOVS     r0,#1
000062  0600              LSLS     r0,r0,#24
000064  4287              CMP      r7,r0
000066  d301              BCC      |L2.108|
;;;113            u32Prescale = 1;    // real prescaler value is 2
000068  2601              MOVS     r6,#1
;;;114            u32Clk >>= 1;
00006a  087f              LSRS     r7,r7,#1
                  |L2.108|
;;;115        }
;;;116    
;;;117        // u32Usec * u32Clk might overflow if using uint32_t
;;;118        fCmpr = ((double)u32Usec * (double)u32Clk) / 1000000.0;
00006c  4638              MOV      r0,r7
00006e  f7fffffe          BL       __aeabi_ui2d
000072  4607              MOV      r7,r0
000074  9100              STR      r1,[sp,#0]
000076  9802              LDR      r0,[sp,#8]
000078  f7fffffe          BL       __aeabi_ui2d
00007c  463a              MOV      r2,r7
00007e  9b00              LDR      r3,[sp,#0]
000080  f7fffffe          BL       __aeabi_dmul
000084  2200              MOVS     r2,#0
000086  4b0b              LDR      r3,|L2.180|
000088  f7fffffe          BL       __aeabi_ddiv
;;;119    
;;;120        timer->CMP = (uint32_t)fCmpr;
00008c  f7fffffe          BL       __aeabi_d2uiz
000090  6068              STR      r0,[r5,#4]
;;;121        timer->CTL = TIMER_CTL_CNTEN_Msk | u32Prescale; // one shot mode
000092  2001              MOVS     r0,#1
000094  0780              LSLS     r0,r0,#30
000096  4306              ORRS     r6,r6,r0
000098  602e              STR      r6,[r5,#0]
;;;122    
;;;123        // When system clock is faster than timer clock, it is possible timer active bit cannot set in time while we check it.
;;;124        // And the while loop below return immediately, so put a tiny delay here allowing timer start counting and raise active flag.
;;;125        for(; delay > 0; delay--) {
00009a  2c00              CMP      r4,#0
00009c  d002              BEQ      |L2.164|
                  |L2.158|
;;;126            __NOP();
00009e  bf00              NOP      
0000a0  1e64              SUBS     r4,r4,#1
0000a2  d1fc              BNE      |L2.158|
                  |L2.164|
;;;127        }
;;;128    
;;;129        while(timer->CTL & TIMER_CTL_ACTSTS_Msk);
0000a4  6828              LDR      r0,[r5,#0]
0000a6  0180              LSLS     r0,r0,#6
0000a8  d4fc              BMI      |L2.164|
;;;130    
;;;131    }
0000aa  bdfe              POP      {r1-r7,pc}
;;;132    
                          ENDP

                  |L2.172|
                          DCD      SystemCoreClock
                  |L2.176|
                          DCD      0x00002710
                  |L2.180|
                          DCD      0x412e8480

                          AREA ||i.TIMER_DisableCapture||, CODE, READONLY, ALIGN=1

                  TIMER_DisableCapture PROC
;;;158      */
;;;159    void TIMER_DisableCapture(TIMER_T *timer)
000000  6941              LDR      r1,[r0,#0x14]
;;;160    {
;;;161        timer->EXTCTL &= ~TIMER_EXTCTL_CAPEN_Msk;
000002  2208              MOVS     r2,#8
000004  4391              BICS     r1,r1,r2
000006  6141              STR      r1,[r0,#0x14]
;;;162    
;;;163    }
000008  4770              BX       lr
;;;164    
                          ENDP


                          AREA ||i.TIMER_DisableEventCounter||, CODE, READONLY, ALIGN=1

                  TIMER_DisableEventCounter PROC
;;;185      */
;;;186    void TIMER_DisableEventCounter(TIMER_T *timer)
000000  6801              LDR      r1,[r0,#0]
;;;187    {
;;;188        timer->CTL &= ~TIMER_CTL_EXTCNTEN_Msk;
000002  2201              MOVS     r2,#1
000004  0612              LSLS     r2,r2,#24
000006  4391              BICS     r1,r1,r2
000008  6001              STR      r1,[r0,#0]
;;;189    }
00000a  4770              BX       lr
;;;190    
                          ENDP


                          AREA ||i.TIMER_EnableCapture||, CODE, READONLY, ALIGN=1

                  TIMER_EnableCapture PROC
;;;145      */
;;;146    void TIMER_EnableCapture(TIMER_T *timer, uint32_t u32CapMode, uint32_t u32Edge)
000000  b510              PUSH     {r4,lr}
;;;147    {
;;;148    
;;;149        timer->EXTCTL = (timer->EXTCTL & ~(TIMER_EXTCTL_CAPFUNCS_Msk |
000002  6943              LDR      r3,[r0,#0x14]
000004  2416              MOVS     r4,#0x16
000006  43a3              BICS     r3,r3,r4
000008  430b              ORRS     r3,r3,r1
00000a  4313              ORRS     r3,r3,r2
00000c  2108              MOVS     r1,#8
00000e  430b              ORRS     r3,r3,r1
000010  6143              STR      r3,[r0,#0x14]
;;;150                                           TIMER_EXTCTL_CAPEDGE_Msk)) |
;;;151                        u32CapMode | u32Edge | TIMER_EXTCTL_CAPEN_Msk;
;;;152    }
000012  bd10              POP      {r4,pc}
;;;153    
                          ENDP


                          AREA ||i.TIMER_EnableEventCounter||, CODE, READONLY, ALIGN=1

                  TIMER_EnableEventCounter PROC
;;;174      */
;;;175    void TIMER_EnableEventCounter(TIMER_T *timer, uint32_t u32Edge)
000000  6942              LDR      r2,[r0,#0x14]
;;;176    {
;;;177        timer->EXTCTL = (timer->EXTCTL & ~TIMER_EXTCTL_CNTPHASE_Msk) | u32Edge;
000002  0852              LSRS     r2,r2,#1
000004  0052              LSLS     r2,r2,#1
000006  430a              ORRS     r2,r2,r1
000008  6142              STR      r2,[r0,#0x14]
;;;178        timer->CTL |= TIMER_CTL_EXTCNTEN_Msk;
00000a  6801              LDR      r1,[r0,#0]
00000c  2201              MOVS     r2,#1
00000e  0612              LSLS     r2,r2,#24
000010  4311              ORRS     r1,r1,r2
000012  6001              STR      r1,[r0,#0]
;;;179    }
000014  4770              BX       lr
;;;180    
                          ENDP


                          AREA ||i.TIMER_GetModuleClock||, CODE, READONLY, ALIGN=2

                  TIMER_GetModuleClock PROC
;;;196      */
;;;197    uint32_t TIMER_GetModuleClock(TIMER_T *timer)
000000  b510              PUSH     {r4,lr}
;;;198    {
000002  b088              SUB      sp,sp,#0x20
000004  4604              MOV      r4,r0
;;;199        uint32_t u32Src;
;;;200        const uint32_t au32Clk[] = {0, __LIRC, 0, 0, 0, 0, 0, __HIRC};
000006  2220              MOVS     r2,#0x20
000008  4914              LDR      r1,|L7.92|
00000a  4668              MOV      r0,sp
00000c  f7fffffe          BL       __aeabi_memcpy4
;;;201    
;;;202        if(timer == TIMER0)
000010  4813              LDR      r0,|L7.96|
;;;203            u32Src = (CLK->CLKSEL1 & CLK_CLKSEL1_TMR0SEL_Msk) >> CLK_CLKSEL1_TMR0SEL_Pos;
000012  4914              LDR      r1,|L7.100|
000014  4284              CMP      r4,r0                 ;202
;;;204        else  // Timer 1
;;;205            u32Src = (CLK->CLKSEL1 & CLK_CLKSEL1_TMR1SEL_Msk) >> CLK_CLKSEL1_TMR1SEL_Pos;
000016  6948              LDR      r0,[r1,#0x14]
000018  d101              BNE      |L7.30|
;;;206    
;;;207        if(u32Src == 0) {
;;;208            if((CLK->PWRCTL & CLK_PWRCTL_XTLEN_Msk) == 0x01 )
;;;209                return __HXT;
;;;210            else if((CLK->PWRCTL & CLK_PWRCTL_XTLEN_Msk) == 0x02 )
;;;211                return __LXT;
;;;212        }
;;;213    
;;;214        if(u32Src == 2) {
;;;215            return(SystemCoreClock);
;;;216        }
;;;217    
;;;218        return(au32Clk[u32Src]);
;;;219    
;;;220    }
00001a  0a00              LSRS     r0,r0,#8
00001c  e000              B        |L7.32|
                  |L7.30|
00001e  0b00              LSRS     r0,r0,#12
                  |L7.32|
000020  0740              LSLS     r0,r0,#29
000022  0f40              LSRS     r0,r0,#29
000024  d002              BEQ      |L7.44|
000026  2802              CMP      r0,#2                 ;214
000028  d014              BEQ      |L7.84|
00002a  e009              B        |L7.64|
                  |L7.44|
00002c  680a              LDR      r2,[r1,#0]            ;208
00002e  0792              LSLS     r2,r2,#30             ;208
000030  0f92              LSRS     r2,r2,#30             ;208
000032  2a01              CMP      r2,#1                 ;208
000034  d009              BEQ      |L7.74|
000036  6809              LDR      r1,[r1,#0]            ;210
000038  0789              LSLS     r1,r1,#30             ;210
00003a  0f89              LSRS     r1,r1,#30             ;210
00003c  2902              CMP      r1,#2                 ;210
00003e  d006              BEQ      |L7.78|
                  |L7.64|
000040  0080              LSLS     r0,r0,#2              ;218
000042  4669              MOV      r1,sp                 ;218
000044  5808              LDR      r0,[r1,r0]            ;218
                  |L7.70|
000046  b008              ADD      sp,sp,#0x20
000048  bd10              POP      {r4,pc}
                  |L7.74|
00004a  4807              LDR      r0,|L7.104|
00004c  e7fb              B        |L7.70|
                  |L7.78|
00004e  2001              MOVS     r0,#1                 ;211
000050  03c0              LSLS     r0,r0,#15             ;211
000052  e7f8              B        |L7.70|
                  |L7.84|
000054  4805              LDR      r0,|L7.108|
000056  6800              LDR      r0,[r0,#0]            ;215  ; SystemCoreClock
000058  e7f5              B        |L7.70|
;;;221    
                          ENDP

00005a  0000              DCW      0x0000
                  |L7.92|
                          DCD      ||.constdata||
                  |L7.96|
                          DCD      0x40010000
                  |L7.100|
                          DCD      0x50000200
                  |L7.104|
                          DCD      0x00b71b00
                  |L7.108|
                          DCD      SystemCoreClock

                          AREA ||i.TIMER_Open||, CODE, READONLY, ALIGN=1

                  TIMER_Open PROC
;;;40       */
;;;41     uint32_t TIMER_Open(TIMER_T *timer, uint32_t u32Mode, uint32_t u32Freq)
000000  b5f7              PUSH     {r0-r2,r4-r7,lr}
;;;42     {
000002  4617              MOV      r7,r2
000004  4606              MOV      r6,r0
;;;43         uint32_t u32Clk = TIMER_GetModuleClock(timer);
000006  f7fffffe          BL       TIMER_GetModuleClock
00000a  4604              MOV      r4,r0
;;;44         uint32_t u32Cmpr = 0, u32Prescale = 0;
00000c  2500              MOVS     r5,#0
;;;45     
;;;46         // Fastest possible timer working freq is u32Clk / 2. While cmpr = 2, pre-scale = 0
;;;47         if(u32Freq > (u32Clk / 2)) {
00000e  0840              LSRS     r0,r0,#1
000010  42b8              CMP      r0,r7
000012  d201              BCS      |L8.24|
;;;48             u32Cmpr = 2;
000014  2002              MOVS     r0,#2
000016  e017              B        |L8.72|
                  |L8.24|
;;;49         } else {
;;;50             if(u32Clk >= 0x4000000) {
000018  2101              MOVS     r1,#1
00001a  0689              LSLS     r1,r1,#26
00001c  428c              CMP      r4,r1
00001e  d302              BCC      |L8.38|
;;;51                 u32Prescale = 7;    // real prescaler value is 8
000020  2507              MOVS     r5,#7
;;;52                 u32Clk >>= 3;
000022  08e4              LSRS     r4,r4,#3
000024  e00c              B        |L8.64|
                  |L8.38|
;;;53             } else if(u32Clk >= 0x2000000) {
000026  2101              MOVS     r1,#1
000028  0649              LSLS     r1,r1,#25
00002a  428c              CMP      r4,r1
00002c  d302              BCC      |L8.52|
;;;54                 u32Prescale = 3;    // real prescaler value is 4
00002e  2503              MOVS     r5,#3
;;;55                 u32Clk >>= 2;
000030  08a4              LSRS     r4,r4,#2
000032  e005              B        |L8.64|
                  |L8.52|
;;;56             } else if(u32Clk >= 0x1000000) {
000034  2101              MOVS     r1,#1
000036  0609              LSLS     r1,r1,#24
000038  428c              CMP      r4,r1
00003a  d301              BCC      |L8.64|
;;;57                 u32Prescale = 1;    // real prescaler value is 2
00003c  2501              MOVS     r5,#1
;;;58                 u32Clk >>= 1;
00003e  4604              MOV      r4,r0
                  |L8.64|
;;;59             }
;;;60     
;;;61             u32Cmpr = u32Clk / u32Freq;
000040  4639              MOV      r1,r7
000042  4620              MOV      r0,r4
000044  f7fffffe          BL       __aeabi_uidivmod
                  |L8.72|
;;;62         }
;;;63     
;;;64         timer->CTL = u32Mode | u32Prescale;
000048  9901              LDR      r1,[sp,#4]
00004a  4329              ORRS     r1,r1,r5
00004c  6031              STR      r1,[r6,#0]
;;;65         timer->CMP = u32Cmpr;
00004e  6070              STR      r0,[r6,#4]
000050  1c6d              ADDS     r5,r5,#1
;;;66     
;;;67         return(u32Clk / (u32Cmpr * (u32Prescale + 1)));
000052  4368              MULS     r0,r5,r0
000054  4601              MOV      r1,r0
000056  4620              MOV      r0,r4
000058  f7fffffe          BL       __aeabi_uidivmod
;;;68     }
00005c  bdfe              POP      {r1-r7,pc}
;;;69     
                          ENDP


                          AREA ||.constdata||, DATA, READONLY, ALIGN=2

                          DCD      0x00000000
                          DCD      0x00002710
                          DCD      0x00000000
                          DCD      0x00000000
                          DCD      0x00000000
                          DCD      0x00000000
                          DCD      0x00000000
                          DCD      0x02dc6c00

;*** Start embedded assembler ***

#line 1 "..\\..\\..\\..\\Library\\StdDriver\\src\\timer.c"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___7_timer_c_5bec749a____REV16|
#line 118 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cmInstr.h"
|__asm___7_timer_c_5bec749a____REV16| PROC
#line 119

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___7_timer_c_5bec749a____REVSH|
#line 132
|__asm___7_timer_c_5bec749a____REVSH| PROC
#line 133

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
