; generated by Component: ARM Compiler 5.04 update 1 (build 49) Tool: ArmCC [5040049]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\obj\usci_uart.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\usci_uart.d --cpu=Cortex-M0 --apcs=interwork -I..\..\..\..\Library\CMSIS\Include -I..\..\..\..\Library\Device\Nuvoton\NM1120\Include -I..\..\..\..\Library\StdDriver\inc -I.\source -IC:\Keil_v5\ARM\RV31\INC -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\3.20.4\CMSIS\Include -D__MICROLIB --omf_browse=.\obj\usci_uart.crf ..\..\..\..\Library\StdDriver\src\usci_uart.c]
                          THUMB

                          AREA ||i.USCI_UART_ClearIntFlag||, CODE, READONLY, ALIGN=1

                  USCI_UART_ClearIntFlag PROC
;;;47     
;;;48     void USCI_UART_ClearIntFlag(USCI_T* usci , uint32_t u32Mask)
000000  07ca              LSLS     r2,r1,#31
;;;49     {
000002  d002              BEQ      |L1.10|
;;;50     
;;;51         if(u32Mask & USCI_UART_BRK_INT_MASK)   /* Clear LIN Break Detected Interrupt */
;;;52             usci->PROTSTS = USCI_PROTSTS_BRKDETIF_Msk;
000004  22ff              MOVS     r2,#0xff
000006  3201              ADDS     r2,#1
000008  6642              STR      r2,[r0,#0x64]
                  |L1.10|
;;;53     
;;;54         if(u32Mask & USCI_UART_ABR_INT_MASK)  /* Clear Auto-baud Rate Interrupt */
00000a  078a              LSLS     r2,r1,#30
00000c  d502              BPL      |L1.20|
;;;55             usci->PROTSTS = USCI_PROTSTS_ABRDETIF_Msk;
00000e  2201              MOVS     r2,#1
000010  0252              LSLS     r2,r2,#9
000012  6642              STR      r2,[r0,#0x64]
                  |L1.20|
;;;56     
;;;57         if(u32Mask & USCI_UART_RLS_INT_MASK)   /* Clear Receive Line Status Interrupt */
000014  074a              LSLS     r2,r1,#29
000016  d501              BPL      |L1.28|
;;;58             usci->PROTSTS = (USCI_PROTSTS_BREAK_Msk | USCI_PROTSTS_FRMERR_Msk | USCI_PROTSTS_PARITYERR_Msk);
000018  22e0              MOVS     r2,#0xe0
00001a  6642              STR      r2,[r0,#0x64]
                  |L1.28|
;;;59     
;;;60         if(u32Mask & USCI_UART_BUF_RXOV_INT_MASK)   /* Clear Receive Buffer Over-run Error Interrupt */
00001c  070b              LSLS     r3,r1,#28
;;;61             usci->BUFSTS = USCI_BUFSTS_RXOVIF_Msk;
00001e  2208              MOVS     r2,#8
000020  2b00              CMP      r3,#0                 ;60
000022  da00              BGE      |L1.38|
000024  63c2              STR      r2,[r0,#0x3c]
                  |L1.38|
;;;62     
;;;63         if(u32Mask & USCI_UART_TXST_INT_MASK)   /* Clear Transmit Start Interrupt */
000026  06cb              LSLS     r3,r1,#27
000028  d501              BPL      |L1.46|
;;;64             usci->PROTSTS = USCI_PROTSTS_TXSTIF_Msk;
00002a  2302              MOVS     r3,#2
00002c  6643              STR      r3,[r0,#0x64]
                  |L1.46|
;;;65     
;;;66         if(u32Mask & USCI_UART_TXEND_INT_MASK)   /* Clear Transmit End Interrupt */
00002e  068b              LSLS     r3,r1,#26
000030  d501              BPL      |L1.54|
;;;67             usci->PROTSTS = USCI_PROTSTS_TXENDIF_Msk;
000032  2304              MOVS     r3,#4
000034  6643              STR      r3,[r0,#0x64]
                  |L1.54|
;;;68     
;;;69         if(u32Mask & USCI_UART_RXST_INT_MASK)   /* Clear Receive Start Interrupt */
000036  064b              LSLS     r3,r1,#25
000038  d500              BPL      |L1.60|
;;;70             usci->PROTSTS = USCI_PROTSTS_RXSTIF_Msk;
00003a  6642              STR      r2,[r0,#0x64]
                  |L1.60|
;;;71     
;;;72         if(u32Mask & USCI_UART_RXEND_INT_MASK)   /* Clear Receive End Interrupt */
00003c  0609              LSLS     r1,r1,#24
00003e  d501              BPL      |L1.68|
;;;73             usci->PROTSTS = USCI_PROTSTS_RXENDIF_Msk;
000040  2110              MOVS     r1,#0x10
000042  6641              STR      r1,[r0,#0x64]
                  |L1.68|
;;;74     
;;;75     }
000044  4770              BX       lr
;;;76     
                          ENDP


                          AREA ||i.USCI_UART_Close||, CODE, READONLY, ALIGN=1

                  USCI_UART_Close PROC
;;;148     */
;;;149    void USCI_UART_Close(USCI_T* usci)
000000  2100              MOVS     r1,#0
;;;150    {
;;;151        usci->CTL = 0;
000002  6001              STR      r1,[r0,#0]
;;;152    }
000004  4770              BX       lr
;;;153    
                          ENDP


                          AREA ||i.USCI_UART_DisableInt||, CODE, READONLY, ALIGN=1

                  USCI_UART_DisableInt PROC
;;;174     */
;;;175    void USCI_UART_DisableInt(USCI_T*  usci, uint32_t u32Mask)
000000  b530              PUSH     {r4,r5,lr}
;;;176    {
;;;177        /* Disable LIN break detected interrupt flag */
;;;178        if((u32Mask & USCI_UART_BRK_INT_MASK) == USCI_UART_BRK_INT_MASK)
000002  07ca              LSLS     r2,r1,#31
000004  d003              BEQ      |L3.14|
;;;179            usci->PROTIEN &= ~USCI_PROTIEN_BRKIEN_Msk;
000006  6e02              LDR      r2,[r0,#0x60]
000008  0852              LSRS     r2,r2,#1
00000a  0052              LSLS     r2,r2,#1
00000c  6602              STR      r2,[r0,#0x60]
                  |L3.14|
;;;180    
;;;181        /* Disable Auto-baud rate interrupt flag */
;;;182        if((u32Mask & USCI_UART_ABR_INT_MASK) == USCI_UART_ABR_INT_MASK)
00000e  078a              LSLS     r2,r1,#30
;;;183            usci->PROTIEN &= ~USCI_PROTIEN_ABRIEN_Msk;
000010  2402              MOVS     r4,#2
000012  2a00              CMP      r2,#0                 ;182
000014  da02              BGE      |L3.28|
000016  6e02              LDR      r2,[r0,#0x60]
000018  43a2              BICS     r2,r2,r4
00001a  6602              STR      r2,[r0,#0x60]
                  |L3.28|
;;;184    
;;;185        /* Disable receive line status interrupt flag */
;;;186        if((u32Mask & USCI_UART_RLS_INT_MASK) == USCI_UART_RLS_INT_MASK)
00001c  074b              LSLS     r3,r1,#29
;;;187            usci->PROTIEN &= ~USCI_PROTIEN_RLSIEN_Msk;
00001e  2204              MOVS     r2,#4
000020  2b00              CMP      r3,#0                 ;186
000022  da02              BGE      |L3.42|
000024  6e03              LDR      r3,[r0,#0x60]
000026  4393              BICS     r3,r3,r2
000028  6603              STR      r3,[r0,#0x60]
                  |L3.42|
;;;188    
;;;189        /* Disable RX overrun interrupt flag */
;;;190        if((u32Mask & USCI_UART_BUF_RXOV_INT_MASK) == USCI_UART_BUF_RXOV_INT_MASK)
00002a  070b              LSLS     r3,r1,#28
00002c  d504              BPL      |L3.56|
;;;191            usci->INTEN &= ~USCI_BUFCTL_RXOVIEN_Msk;
00002e  6843              LDR      r3,[r0,#4]
000030  2501              MOVS     r5,#1
000032  03ad              LSLS     r5,r5,#14
000034  43ab              BICS     r3,r3,r5
000036  6043              STR      r3,[r0,#4]
                  |L3.56|
;;;192    
;;;193        /* Disable TX start interrupt flag */
;;;194        if((u32Mask & USCI_UART_TXST_INT_MASK) == USCI_UART_TXST_INT_MASK)
000038  06cb              LSLS     r3,r1,#27
00003a  d502              BPL      |L3.66|
;;;195            usci->INTEN &= ~USCI_INTEN_TXSTIEN_Msk;
00003c  6843              LDR      r3,[r0,#4]
00003e  43a3              BICS     r3,r3,r4
000040  6043              STR      r3,[r0,#4]
                  |L3.66|
;;;196    
;;;197        /* Disable TX end interrupt flag */
;;;198        if((u32Mask & USCI_UART_TXEND_INT_MASK) == USCI_UART_TXEND_INT_MASK)
000042  068b              LSLS     r3,r1,#26
000044  d502              BPL      |L3.76|
;;;199            usci->INTEN &= ~USCI_INTEN_TXENDIEN_Msk;
000046  6843              LDR      r3,[r0,#4]
000048  4393              BICS     r3,r3,r2
00004a  6043              STR      r3,[r0,#4]
                  |L3.76|
;;;200    
;;;201        /* Disable RX start interrupt flag */
;;;202        if((u32Mask & USCI_UART_RXST_INT_MASK) == USCI_UART_RXST_INT_MASK)
00004c  064a              LSLS     r2,r1,#25
00004e  d503              BPL      |L3.88|
;;;203            usci->INTEN &= ~USCI_INTEN_RXSTIEN_Msk;
000050  6842              LDR      r2,[r0,#4]
000052  2308              MOVS     r3,#8
000054  439a              BICS     r2,r2,r3
000056  6042              STR      r2,[r0,#4]
                  |L3.88|
;;;204    
;;;205        /* Disable RX end interrupt flag */
;;;206        if((u32Mask & USCI_UART_RXEND_INT_MASK) == USCI_UART_RXEND_INT_MASK)
000058  0609              LSLS     r1,r1,#24
00005a  d503              BPL      |L3.100|
;;;207            usci->INTEN &= ~USCI_INTEN_RXENDIEN_Msk;
00005c  6841              LDR      r1,[r0,#4]
00005e  2210              MOVS     r2,#0x10
000060  4391              BICS     r1,r1,r2
000062  6041              STR      r1,[r0,#4]
                  |L3.100|
;;;208    }
000064  bd30              POP      {r4,r5,pc}
;;;209    
                          ENDP


                          AREA ||i.USCI_UART_DisableWakeup||, CODE, READONLY, ALIGN=1

                  USCI_UART_DisableWakeup PROC
;;;526     */
;;;527    void USCI_UART_DisableWakeup(USCI_T* usci)
000000  6d41              LDR      r1,[r0,#0x54]
;;;528    {
;;;529        usci->WKCTL &= ~USCI_WKCTL_WKEN_Msk;
000002  0849              LSRS     r1,r1,#1
000004  0049              LSLS     r1,r1,#1
000006  6541              STR      r1,[r0,#0x54]
;;;530    }
000008  4770              BX       lr
;;;531    
                          ENDP


                          AREA ||i.USCI_UART_EnableInt||, CODE, READONLY, ALIGN=1

                  USCI_UART_EnableInt PROC
;;;230     */
;;;231    void USCI_UART_EnableInt(USCI_T*  usci, uint32_t u32Mask)
000000  b530              PUSH     {r4,r5,lr}
;;;232    {
;;;233        /* Enable LIN break detected interrupt flag */
;;;234        if((u32Mask & USCI_UART_BRK_INT_MASK) == USCI_UART_BRK_INT_MASK)
000002  07ca              LSLS     r2,r1,#31
000004  d003              BEQ      |L5.14|
;;;235            usci->PROTIEN |= USCI_PROTIEN_BRKIEN_Msk;
000006  6e02              LDR      r2,[r0,#0x60]
000008  2301              MOVS     r3,#1
00000a  431a              ORRS     r2,r2,r3
00000c  6602              STR      r2,[r0,#0x60]
                  |L5.14|
;;;236    
;;;237        /* Enable Auto-baud rate interrupt flag */
;;;238        if((u32Mask & USCI_UART_ABR_INT_MASK) == USCI_UART_ABR_INT_MASK)
00000e  078a              LSLS     r2,r1,#30
;;;239            usci->PROTIEN |= USCI_PROTIEN_ABRIEN_Msk;
000010  2402              MOVS     r4,#2
000012  2a00              CMP      r2,#0                 ;238
000014  da02              BGE      |L5.28|
000016  6e02              LDR      r2,[r0,#0x60]
000018  4322              ORRS     r2,r2,r4
00001a  6602              STR      r2,[r0,#0x60]
                  |L5.28|
;;;240    
;;;241        /* Enable receive line status interrupt flag */
;;;242        if((u32Mask & USCI_UART_RLS_INT_MASK) == USCI_UART_RLS_INT_MASK)
00001c  074b              LSLS     r3,r1,#29
;;;243            usci->PROTIEN |= USCI_PROTIEN_RLSIEN_Msk;
00001e  2204              MOVS     r2,#4
000020  2b00              CMP      r3,#0                 ;242
000022  da02              BGE      |L5.42|
000024  6e03              LDR      r3,[r0,#0x60]
000026  4313              ORRS     r3,r3,r2
000028  6603              STR      r3,[r0,#0x60]
                  |L5.42|
;;;244    
;;;245        /* Enable RX overrun interrupt flag */
;;;246        if((u32Mask & USCI_UART_BUF_RXOV_INT_MASK) == USCI_UART_BUF_RXOV_INT_MASK)
00002a  070b              LSLS     r3,r1,#28
00002c  d504              BPL      |L5.56|
;;;247            usci->INTEN |= USCI_BUFCTL_RXOVIEN_Msk;
00002e  6843              LDR      r3,[r0,#4]
000030  2501              MOVS     r5,#1
000032  03ad              LSLS     r5,r5,#14
000034  432b              ORRS     r3,r3,r5
000036  6043              STR      r3,[r0,#4]
                  |L5.56|
;;;248    
;;;249        /* Enable TX start interrupt flag */
;;;250        if((u32Mask & USCI_UART_TXST_INT_MASK) == USCI_UART_TXST_INT_MASK)
000038  06cb              LSLS     r3,r1,#27
00003a  d502              BPL      |L5.66|
;;;251            usci->INTEN |= USCI_INTEN_TXSTIEN_Msk;
00003c  6843              LDR      r3,[r0,#4]
00003e  4323              ORRS     r3,r3,r4
000040  6043              STR      r3,[r0,#4]
                  |L5.66|
;;;252    
;;;253        /* Enable TX end interrupt flag */
;;;254        if((u32Mask & USCI_UART_TXEND_INT_MASK) == USCI_UART_TXEND_INT_MASK)
000042  068b              LSLS     r3,r1,#26
000044  d502              BPL      |L5.76|
;;;255            usci->INTEN |= USCI_INTEN_TXENDIEN_Msk;
000046  6843              LDR      r3,[r0,#4]
000048  4313              ORRS     r3,r3,r2
00004a  6043              STR      r3,[r0,#4]
                  |L5.76|
;;;256    
;;;257        /* Enable RX start interrupt flag */
;;;258        if((u32Mask & USCI_UART_RXST_INT_MASK) == USCI_UART_RXST_INT_MASK)
00004c  064a              LSLS     r2,r1,#25
00004e  d503              BPL      |L5.88|
;;;259            usci->INTEN |= USCI_INTEN_RXSTIEN_Msk;
000050  6842              LDR      r2,[r0,#4]
000052  2308              MOVS     r3,#8
000054  431a              ORRS     r2,r2,r3
000056  6042              STR      r2,[r0,#4]
                  |L5.88|
;;;260    
;;;261        /* Enable RX end interrupt flag */
;;;262        if((u32Mask & USCI_UART_RXEND_INT_MASK) == USCI_UART_RXEND_INT_MASK)
000058  0609              LSLS     r1,r1,#24
00005a  d503              BPL      |L5.100|
;;;263            usci->INTEN |= USCI_INTEN_RXENDIEN_Msk;
00005c  6841              LDR      r1,[r0,#4]
00005e  2210              MOVS     r2,#0x10
000060  4311              ORRS     r1,r1,r2
000062  6041              STR      r1,[r0,#4]
                  |L5.100|
;;;264    }
000064  bd30              POP      {r4,r5,pc}
;;;265    
                          ENDP


                          AREA ||i.USCI_UART_EnableWakeup||, CODE, READONLY, ALIGN=1

                  USCI_UART_EnableWakeup PROC
;;;510     */
;;;511    void USCI_UART_EnableWakeup(USCI_T* usci, uint32_t u32WakeupMode)
000000  6dc1              LDR      r1,[r0,#0x5c]
;;;512    {
;;;513        usci->PROTCTL |= USCI_PROTCTL_DATWKEN_Msk;
000002  2201              MOVS     r2,#1
000004  0252              LSLS     r2,r2,#9
000006  4311              ORRS     r1,r1,r2
000008  65c1              STR      r1,[r0,#0x5c]
;;;514        usci->WKCTL |= USCI_WKCTL_WKEN_Msk;
00000a  6d41              LDR      r1,[r0,#0x54]
00000c  2201              MOVS     r2,#1
00000e  4311              ORRS     r1,r1,r2
000010  6541              STR      r1,[r0,#0x54]
;;;515    }
000012  4770              BX       lr
;;;516    
                          ENDP


                          AREA ||i.USCI_UART_GetIntFlag||, CODE, READONLY, ALIGN=1

                  USCI_UART_GetIntFlag PROC
;;;98     
;;;99     uint32_t USCI_UART_GetIntFlag(USCI_T* usci , uint32_t u32Mask)
000000  4602              MOV      r2,r0
;;;100    {
;;;101        uint32_t u32IntFlag = 0;
000002  2000              MOVS     r0,#0
;;;102    
;;;103        /* Check LIN Break Detected Interrupt Flag */
;;;104        if((u32Mask & USCI_UART_BRK_INT_MASK) && (usci->PROTSTS & USCI_PROTSTS_BRKDETIF_Msk))
000004  07cb              LSLS     r3,r1,#31
000006  d003              BEQ      |L7.16|
000008  6e53              LDR      r3,[r2,#0x64]
00000a  05db              LSLS     r3,r3,#23
00000c  d500              BPL      |L7.16|
;;;105            u32IntFlag |= USCI_UART_BRK_INT_MASK;
00000e  2001              MOVS     r0,#1
                  |L7.16|
;;;106    
;;;107        /* Check Auto-baud Rate Interrupt Flag */
;;;108        if((u32Mask & USCI_UART_ABR_INT_MASK) && (usci->PROTSTS & USCI_PROTSTS_ABRDETIF_Msk))
000010  078b              LSLS     r3,r1,#30
000012  d504              BPL      |L7.30|
000014  6e53              LDR      r3,[r2,#0x64]
000016  059b              LSLS     r3,r3,#22
000018  d501              BPL      |L7.30|
;;;109            u32IntFlag |= USCI_UART_ABR_INT_MASK;
00001a  2302              MOVS     r3,#2
00001c  4318              ORRS     r0,r0,r3
                  |L7.30|
;;;110    
;;;111        /* Check Receive Line Status Interrupt Flag */
;;;112        if((u32Mask & USCI_UART_RLS_INT_MASK) && (usci->PROTSTS & (USCI_PROTSTS_BREAK_Msk | USCI_PROTSTS_FRMERR_Msk | USCI_PROTSTS_PARITYERR_Msk)))
00001e  074b              LSLS     r3,r1,#29
000020  d505              BPL      |L7.46|
000022  6e53              LDR      r3,[r2,#0x64]
000024  061b              LSLS     r3,r3,#24
000026  0f5b              LSRS     r3,r3,#29
000028  d001              BEQ      |L7.46|
;;;113            u32IntFlag |= USCI_UART_RLS_INT_MASK;
00002a  2304              MOVS     r3,#4
00002c  4318              ORRS     r0,r0,r3
                  |L7.46|
;;;114    
;;;115        /* Check Receive Buffer Over-run Error Interrupt Flag */
;;;116        if((u32Mask & USCI_UART_BUF_RXOV_INT_MASK) && (usci->PROTSTS & USCI_BUFSTS_RXOVIF_Msk))
00002e  070b              LSLS     r3,r1,#28
000030  d504              BPL      |L7.60|
000032  6e53              LDR      r3,[r2,#0x64]
000034  071b              LSLS     r3,r3,#28
000036  d501              BPL      |L7.60|
;;;117            u32IntFlag |= USCI_UART_BUF_RXOV_INT_MASK;
000038  2308              MOVS     r3,#8
00003a  4318              ORRS     r0,r0,r3
                  |L7.60|
;;;118    
;;;119        /* Check Transmit Start Interrupt Flag */
;;;120        if((u32Mask & USCI_UART_TXST_INT_MASK) && (usci->PROTSTS & USCI_PROTSTS_TXSTIF_Msk))
00003c  06cb              LSLS     r3,r1,#27
00003e  d504              BPL      |L7.74|
000040  6e53              LDR      r3,[r2,#0x64]
000042  079b              LSLS     r3,r3,#30
000044  d501              BPL      |L7.74|
;;;121            u32IntFlag |= USCI_UART_TXST_INT_MASK;
000046  2310              MOVS     r3,#0x10
000048  4318              ORRS     r0,r0,r3
                  |L7.74|
;;;122    
;;;123        /* Check Transmit End Interrupt Flag */
;;;124        if((u32Mask & USCI_UART_TXEND_INT_MASK) && (usci->PROTSTS & USCI_PROTSTS_TXENDIF_Msk))
00004a  068b              LSLS     r3,r1,#26
00004c  d504              BPL      |L7.88|
00004e  6e53              LDR      r3,[r2,#0x64]
000050  075b              LSLS     r3,r3,#29
000052  d501              BPL      |L7.88|
;;;125            u32IntFlag |= USCI_UART_TXEND_INT_MASK;
000054  2320              MOVS     r3,#0x20
000056  4318              ORRS     r0,r0,r3
                  |L7.88|
;;;126    
;;;127        /* Check Receive Start Interrupt Flag */
;;;128        if((u32Mask & USCI_UART_RXST_INT_MASK) && (usci->PROTSTS & USCI_PROTSTS_RXSTIF_Msk))
000058  064b              LSLS     r3,r1,#25
00005a  d504              BPL      |L7.102|
00005c  6e53              LDR      r3,[r2,#0x64]
00005e  071b              LSLS     r3,r3,#28
000060  d501              BPL      |L7.102|
;;;129            u32IntFlag |= USCI_UART_RXST_INT_MASK;
000062  2340              MOVS     r3,#0x40
000064  4318              ORRS     r0,r0,r3
                  |L7.102|
;;;130    
;;;131        /* Check Receive End Interrupt Flag */
;;;132        if((u32Mask & USCI_UART_RXEND_INT_MASK) && (usci->PROTSTS & USCI_PROTSTS_RXENDIF_Msk))
000066  0609              LSLS     r1,r1,#24
000068  d504              BPL      |L7.116|
00006a  6e51              LDR      r1,[r2,#0x64]
00006c  06c9              LSLS     r1,r1,#27
00006e  d501              BPL      |L7.116|
;;;133            u32IntFlag |= USCI_UART_RXEND_INT_MASK;
000070  2180              MOVS     r1,#0x80
000072  4308              ORRS     r0,r0,r1
                  |L7.116|
;;;134    
;;;135        return u32IntFlag;
;;;136    
;;;137    }
000074  4770              BX       lr
;;;138    
                          ENDP


                          AREA ||i.USCI_UART_Open||, CODE, READONLY, ALIGN=2

                  USCI_UART_Open PROC
;;;276     */
;;;277    uint32_t USCI_UART_Open(USCI_T* usci, uint32_t u32baudrate)
000000  b5f3              PUSH     {r0,r1,r4-r7,lr}
;;;278    {
000002  b087              SUB      sp,sp,#0x1c
000004  460f              MOV      r7,r1
;;;279        uint32_t u32PCLKFreq, u32PDSClk, u32PDSCnt, u32DSCnt, u32ClkDiv;
;;;280        uint32_t u32Tmp, u32Tmp2, u32Min, u32MinClkDiv, u32MinDSCnt;
;;;281    
;;;282        /* Get PCLK frequency */
;;;283        u32PDSClk = u32PCLKFreq = CLK_GetPCLKFreq();
000006  f7fffffe          BL       CLK_GetPCLKFreq
;;;284    
;;;285        for(u32PDSCnt = 1; u32PDSCnt <= 0x04; u32PDSCnt++) { //PDSCNT could be 0~0x3
00000a  9001              STR      r0,[sp,#4]
00000c  2001              MOVS     r0,#1
;;;286            u32PDSClk = u32PCLKFreq / u32PDSCnt;
;;;287    
;;;288            if(u32PDSClk > (36000000))
00000e  4c32              LDR      r4,|L8.216|
000010  9000              STR      r0,[sp,#0]
                  |L8.18|
000012  4601              MOV      r1,r0                 ;286
000014  9801              LDR      r0,[sp,#4]            ;286
000016  f7fffffe          BL       __aeabi_uidivmod
00001a  9004              STR      r0,[sp,#0x10]
00001c  42a0              CMP      r0,r4
00001e  d904              BLS      |L8.42|
000020  9800              LDR      r0,[sp,#0]            ;285
000022  1c40              ADDS     r0,r0,#1              ;285
000024  9000              STR      r0,[sp,#0]            ;285
000026  2804              CMP      r0,#4                 ;285
000028  d9f3              BLS      |L8.18|
                  |L8.42|
;;;289                continue;
;;;290    
;;;291            break;
;;;292        }
;;;293    
;;;294        /* Find best solution */
;;;295        u32Min = (uint32_t) - 1;
;;;296        u32MinDSCnt = 0;
00002a  2000              MOVS     r0,#0
00002c  2600              MOVS     r6,#0                 ;295
00002e  43f6              MVNS     r6,r6                 ;295
;;;297        u32MinClkDiv = 0;
000030  9002              STR      r0,[sp,#8]
;;;298        for(u32DSCnt = 6; u32DSCnt <= 0x20; u32DSCnt++) { //DSCNT could be 0x5~0x1F
000032  2506              MOVS     r5,#6
000034  9003              STR      r0,[sp,#0xc]
                  |L8.54|
;;;299            for(u32ClkDiv = 1; u32ClkDiv <= 0x400; u32ClkDiv++) { //CLKDIV could be 0~0x3FF
000036  2401              MOVS     r4,#1
000038  4629              MOV      r1,r5                 ;279
;;;300                u32Tmp = u32PDSClk / u32DSCnt / u32ClkDiv;
00003a  9804              LDR      r0,[sp,#0x10]
00003c  f7fffffe          BL       __aeabi_uidivmod
000040  9005              STR      r0,[sp,#0x14]
                  |L8.66|
000042  4621              MOV      r1,r4
000044  f7fffffe          BL       __aeabi_uidivmod
;;;301    
;;;302                u32Tmp2 = (u32Tmp > u32baudrate) ? u32Tmp - u32baudrate : u32baudrate - u32Tmp;
000048  42b8              CMP      r0,r7
00004a  d901              BLS      |L8.80|
00004c  1bc0              SUBS     r0,r0,r7
00004e  e000              B        |L8.82|
                  |L8.80|
000050  1a38              SUBS     r0,r7,r0
                  |L8.82|
;;;303    
;;;304                if(u32Tmp2 < u32Min) {
000052  42b0              CMP      r0,r6
000054  d203              BCS      |L8.94|
;;;305                    u32Min = u32Tmp2;
000056  0006              MOVS     r6,r0
;;;306                    u32MinDSCnt = u32DSCnt;
;;;307                    u32MinClkDiv = u32ClkDiv;
;;;308    
;;;309                    /* Break when get good results */
;;;310                    if(u32Min == 0)
000058  9502              STR      r5,[sp,#8]
00005a  9403              STR      r4,[sp,#0xc]
00005c  d006              BEQ      |L8.108|
                  |L8.94|
00005e  2001              MOVS     r0,#1                 ;299
000060  0280              LSLS     r0,r0,#10             ;299
000062  1c64              ADDS     r4,r4,#1              ;299
000064  4284              CMP      r4,r0                 ;299
000066  d801              BHI      |L8.108|
000068  9805              LDR      r0,[sp,#0x14]         ;299
00006a  e7ea              B        |L8.66|
                  |L8.108|
00006c  1c6d              ADDS     r5,r5,#1              ;299
00006e  2d20              CMP      r5,#0x20              ;298
000070  d9e1              BLS      |L8.54|
;;;311                        break;
;;;312                }
;;;313            }
;;;314        }
;;;315    
;;;316        /* Enable USCI_UART protocol */
;;;317        usci->CTL &= ~USCI_CTL_FUNMODE_Msk;
000072  9807              LDR      r0,[sp,#0x1c]
000074  6800              LDR      r0,[r0,#0]
000076  08c1              LSRS     r1,r0,#3
000078  9807              LDR      r0,[sp,#0x1c]
00007a  00c9              LSLS     r1,r1,#3
00007c  6001              STR      r1,[r0,#0]
;;;318        usci->CTL = 2 << USCI_CTL_FUNMODE_Pos;
00007e  9807              LDR      r0,[sp,#0x1c]
000080  2102              MOVS     r1,#2
000082  6001              STR      r1,[r0,#0]
;;;319    
;;;320        /* Set USCI_UART line configuration */
;;;321        usci->LINECTL = USCI_UART_WORD_LEN_8 | USCI_LINECTL_LSB_Msk;
000084  9807              LDR      r0,[sp,#0x1c]
000086  4915              LDR      r1,|L8.220|
000088  62c1              STR      r1,[r0,#0x2c]
;;;322        usci->DATIN0 = (2 << USCI_DATIN0_EDGEDET_Pos);  //Set falling edge detection
00008a  9807              LDR      r0,[sp,#0x1c]
00008c  2110              MOVS     r1,#0x10
00008e  6101              STR      r1,[r0,#0x10]
;;;323    
;;;324        /* Set USCI_UART baud rate */
;;;325        usci->BRGEN = ((u32MinClkDiv-1) << USCI_BRGEN_CLKDIV_Pos) |
000090  9902              LDR      r1,[sp,#8]
000092  9803              LDR      r0,[sp,#0xc]
000094  028a              LSLS     r2,r1,#10
000096  2101              MOVS     r1,#1
000098  1e40              SUBS     r0,r0,#1
00009a  0289              LSLS     r1,r1,#10
00009c  0400              LSLS     r0,r0,#16
00009e  1a51              SUBS     r1,r2,r1
0000a0  4308              ORRS     r0,r0,r1
0000a2  9900              LDR      r1,[sp,#0]
0000a4  0209              LSLS     r1,r1,#8
0000a6  39ff              SUBS     r1,r1,#0xff
0000a8  3901              SUBS     r1,#1
0000aa  4308              ORRS     r0,r0,r1
0000ac  9907              LDR      r1,[sp,#0x1c]
0000ae  6088              STR      r0,[r1,#8]
;;;326                      ((u32MinDSCnt-1) << USCI_BRGEN_DSCNT_Pos) |
;;;327                      ((u32PDSCnt-1) << USCI_BRGEN_PDSCNT_Pos);
;;;328    
;;;329        usci->PROTCTL |= USCI_PROTCTL_PROTEN_Msk;
0000b0  9807              LDR      r0,[sp,#0x1c]
0000b2  6dc0              LDR      r0,[r0,#0x5c]
0000b4  2101              MOVS     r1,#1
0000b6  07c9              LSLS     r1,r1,#31
0000b8  4308              ORRS     r0,r0,r1
0000ba  9907              LDR      r1,[sp,#0x1c]
0000bc  65c8              STR      r0,[r1,#0x5c]
;;;330    
;;;331        return (u32PCLKFreq/u32PDSCnt/u32MinDSCnt/u32MinClkDiv);
0000be  9900              LDR      r1,[sp,#0]
0000c0  9801              LDR      r0,[sp,#4]
0000c2  f7fffffe          BL       __aeabi_uidivmod
0000c6  9902              LDR      r1,[sp,#8]
0000c8  f7fffffe          BL       __aeabi_uidivmod
0000cc  9903              LDR      r1,[sp,#0xc]
0000ce  f7fffffe          BL       __aeabi_uidivmod
;;;332    }
0000d2  b009              ADD      sp,sp,#0x24
0000d4  bdf0              POP      {r4-r7,pc}
;;;333    
                          ENDP

0000d6  0000              DCW      0x0000
                  |L8.216|
                          DCD      0x02255100
                  |L8.220|
                          DCD      0x00000801

                          AREA ||i.USCI_UART_Read||, CODE, READONLY, ALIGN=1

                  USCI_UART_Read PROC
;;;345     */
;;;346    uint32_t USCI_UART_Read(USCI_T* usci, uint8_t *pu8RxBuf, uint32_t u32ReadBytes)
000000  b570              PUSH     {r4-r6,lr}
;;;347    {
000002  4604              MOV      r4,r0
;;;348        uint32_t  u32Count, u32delayno;
;;;349    
;;;350        for(u32Count = 0; u32Count < u32ReadBytes; u32Count++) {
000004  2000              MOVS     r0,#0
;;;351            u32delayno = 0;
;;;352    
;;;353            while(usci->BUFSTS & USCI_BUFSTS_RXEMPTY_Msk) { /* Check RX empty => failed */
;;;354                u32delayno++;
;;;355                if(u32delayno >= 0x40000000)
000006  2501              MOVS     r5,#1
000008  07ad              LSLS     r5,r5,#30
00000a  e00c              B        |L9.38|
                  |L9.12|
00000c  2300              MOVS     r3,#0                 ;351
00000e  e004              B        |L9.26|
                  |L9.16|
000010  1c5b              ADDS     r3,r3,#1              ;353
000012  42ab              CMP      r3,r5
000014  d301              BCC      |L9.26|
;;;356                    return FALSE;
000016  2000              MOVS     r0,#0
;;;357            }
;;;358            pu8RxBuf[u32Count] = usci->RXDAT;    /* Get Data from USCI RX  */
;;;359        }
;;;360    
;;;361        return u32Count;
;;;362    
;;;363    }
000018  bd70              POP      {r4-r6,pc}
                  |L9.26|
00001a  6be6              LDR      r6,[r4,#0x3c]         ;353
00001c  07f6              LSLS     r6,r6,#31             ;353
00001e  d1f7              BNE      |L9.16|
000020  6b63              LDR      r3,[r4,#0x34]         ;358
000022  540b              STRB     r3,[r1,r0]            ;358
000024  1c40              ADDS     r0,r0,#1              ;358
                  |L9.38|
000026  4290              CMP      r0,r2                 ;350
000028  d3f0              BCC      |L9.12|
00002a  bd70              POP      {r4-r6,pc}
;;;364    
                          ENDP


                          AREA ||i.USCI_UART_SelectLINMode||, CODE, READONLY, ALIGN=1

                  USCI_UART_SelectLINMode PROC
;;;461     */
;;;462    void USCI_UART_SelectLINMode(USCI_T* usci, uint32_t u32Mode)
000000  2280              MOVS     r2,#0x80
;;;463    {
;;;464        if(u32Mode == USCI_PROTCTL_LINBRKEN_Msk)
;;;465            usci->PROTCTL = (usci->PROTCTL & ~USCI_PROTCTL_LINRXEN_Msk) | USCI_PROTCTL_LINBRKEN_Msk;
000002  0053              LSLS     r3,r2,#1
000004  2980              CMP      r1,#0x80              ;464
;;;466        else
;;;467            usci->PROTCTL = (usci->PROTCTL & ~USCI_PROTCTL_LINBRKEN_Msk) | USCI_PROTCTL_LINRXEN_Msk;
000006  6dc1              LDR      r1,[r0,#0x5c]
000008  d003              BEQ      |L10.18|
00000a  4391              BICS     r1,r1,r2
00000c  4319              ORRS     r1,r1,r3
                  |L10.14|
00000e  65c1              STR      r1,[r0,#0x5c]         ;465
;;;468    }
000010  4770              BX       lr
                  |L10.18|
000012  4399              BICS     r1,r1,r3              ;465
000014  4311              ORRS     r1,r1,r2              ;465
000016  e7fa              B        |L10.14|
;;;469    
                          ENDP


                          AREA ||i.USCI_UART_SetLine_Config||, CODE, READONLY, ALIGN=2

                  USCI_UART_SetLine_Config PROC
;;;389     */
;;;390    uint32_t USCI_UART_SetLine_Config(USCI_T* usci, uint32_t u32baudrate, uint32_t u32data_width, uint32_t u32parity, uint32_t u32stop_bits)
000000  b5ff              PUSH     {r0-r7,lr}
;;;391    {
000002  b087              SUB      sp,sp,#0x1c
000004  460f              MOV      r7,r1
000006  4606              MOV      r6,r0
;;;392        uint32_t u32PCLKFreq, u32PDSClk, u32PDSCnt, u32DSCnt, u32ClkDiv;
;;;393        uint32_t u32Tmp, u32Tmp2, u32Min, u32MinClkDiv, u32MinDSCnt;
;;;394    
;;;395        /* Get PCLK frequency */
;;;396        u32PDSClk = u32PCLKFreq = CLK_GetPCLKFreq();
000008  f7fffffe          BL       CLK_GetPCLKFreq
;;;397    
;;;398        if(u32baudrate != 0) {
00000c  9004              STR      r0,[sp,#0x10]
00000e  2f00              CMP      r7,#0
000010  d045              BEQ      |L11.158|
;;;399            for(u32PDSCnt = 1; u32PDSCnt <= 0x04; u32PDSCnt++) { //PDSCNT could be 0~0x3
000012  2001              MOVS     r0,#1
;;;400                u32PDSClk = u32PCLKFreq / u32PDSCnt;
;;;401    
;;;402                if(u32PDSClk > (36000000))
000014  4c39              LDR      r4,|L11.252|
000016  9003              STR      r0,[sp,#0xc]
                  |L11.24|
000018  4601              MOV      r1,r0                 ;400
00001a  9804              LDR      r0,[sp,#0x10]         ;400
00001c  f7fffffe          BL       __aeabi_uidivmod
000020  9005              STR      r0,[sp,#0x14]
000022  42a0              CMP      r0,r4
000024  d904              BLS      |L11.48|
000026  9803              LDR      r0,[sp,#0xc]          ;399
000028  1c40              ADDS     r0,r0,#1              ;399
00002a  9003              STR      r0,[sp,#0xc]          ;399
00002c  2804              CMP      r0,#4                 ;399
00002e  d9f3              BLS      |L11.24|
                  |L11.48|
;;;403                    continue;
;;;404    
;;;405                break;
;;;406            }
;;;407    
;;;408            /* Find best solution */
;;;409            u32Min = (uint32_t) - 1;
000030  2000              MOVS     r0,#0
000032  43c0              MVNS     r0,r0
;;;410            u32MinDSCnt = 0;
000034  9000              STR      r0,[sp,#0]
000036  2000              MOVS     r0,#0
;;;411            u32MinClkDiv = 0;
000038  9001              STR      r0,[sp,#4]
;;;412            for(u32DSCnt = 6; u32DSCnt <= 0x20; u32DSCnt++) { //DSCNT could be 0x5~0x1F
00003a  2506              MOVS     r5,#6
00003c  9002              STR      r0,[sp,#8]
                  |L11.62|
;;;413                for(u32ClkDiv = 1; u32ClkDiv <= 0x400; u32ClkDiv++) { //CLKDIV could be 0~0x3FF
00003e  2401              MOVS     r4,#1
000040  4629              MOV      r1,r5                 ;392
;;;414                    u32Tmp = u32PDSClk / u32DSCnt / u32ClkDiv;
000042  9805              LDR      r0,[sp,#0x14]
000044  f7fffffe          BL       __aeabi_uidivmod
000048  9006              STR      r0,[sp,#0x18]
                  |L11.74|
00004a  4621              MOV      r1,r4
00004c  f7fffffe          BL       __aeabi_uidivmod
;;;415    
;;;416                    u32Tmp2 = (u32Tmp > u32baudrate) ? u32Tmp - u32baudrate : u32baudrate - u32Tmp;
000050  42b8              CMP      r0,r7
000052  d901              BLS      |L11.88|
000054  1bc0              SUBS     r0,r0,r7
000056  e000              B        |L11.90|
                  |L11.88|
000058  1a38              SUBS     r0,r7,r0
                  |L11.90|
;;;417    
;;;418                    if(u32Tmp2 < u32Min) {
00005a  9900              LDR      r1,[sp,#0]
00005c  4288              CMP      r0,r1
00005e  d204              BCS      |L11.106|
;;;419                        u32Min = u32Tmp2;
;;;420                        u32MinDSCnt = u32DSCnt;
;;;421                        u32MinClkDiv = u32ClkDiv;
;;;422    
;;;423                        /* Break when get good results */
;;;424                        if(u32Min == 0)
000060  9501              STR      r5,[sp,#4]
000062  9402              STR      r4,[sp,#8]
000064  9000              STR      r0,[sp,#0]
000066  2800              CMP      r0,#0
000068  d006              BEQ      |L11.120|
                  |L11.106|
00006a  2001              MOVS     r0,#1                 ;413
00006c  0280              LSLS     r0,r0,#10             ;413
00006e  1c64              ADDS     r4,r4,#1              ;413
000070  4284              CMP      r4,r0                 ;413
000072  d801              BHI      |L11.120|
000074  9806              LDR      r0,[sp,#0x18]         ;413
000076  e7e8              B        |L11.74|
                  |L11.120|
000078  1c6d              ADDS     r5,r5,#1              ;413
00007a  2d20              CMP      r5,#0x20              ;412
00007c  d9df              BLS      |L11.62|
;;;425                            break;
;;;426                    }
;;;427                }
;;;428            }
;;;429    
;;;430            /* Set USCI_UART baud rate */
;;;431            usci->BRGEN = ((u32MinClkDiv-1) << USCI_BRGEN_CLKDIV_Pos) |
00007e  9901              LDR      r1,[sp,#4]
000080  9802              LDR      r0,[sp,#8]
000082  028a              LSLS     r2,r1,#10
000084  2101              MOVS     r1,#1
000086  1e40              SUBS     r0,r0,#1
000088  0289              LSLS     r1,r1,#10
00008a  0400              LSLS     r0,r0,#16
00008c  1a51              SUBS     r1,r2,r1
00008e  4308              ORRS     r0,r0,r1
000090  9903              LDR      r1,[sp,#0xc]
000092  0209              LSLS     r1,r1,#8
000094  39ff              SUBS     r1,r1,#0xff
000096  3901              SUBS     r1,#1
000098  4308              ORRS     r0,r0,r1
00009a  60b0              STR      r0,[r6,#8]
00009c  e00e              B        |L11.188|
                  |L11.158|
;;;432                          ((u32MinDSCnt-1) << USCI_BRGEN_DSCNT_Pos) |
;;;433                          ((u32PDSCnt-1) << USCI_BRGEN_PDSCNT_Pos);
;;;434        } else {
;;;435            u32PDSCnt = ((usci->BRGEN & USCI_BRGEN_PDSCNT_Msk) >> USCI_BRGEN_PDSCNT_Pos) + 1;
00009e  68b0              LDR      r0,[r6,#8]
;;;436            u32MinDSCnt = ((usci->BRGEN & USCI_BRGEN_DSCNT_Msk) >> USCI_BRGEN_DSCNT_Pos) + 1;
;;;437            u32MinClkDiv = ((usci->BRGEN & USCI_BRGEN_CLKDIV_Msk) >> USCI_BRGEN_CLKDIV_Pos) + 1;
;;;438        }
;;;439    
;;;440        /* Set USCI_UART line configuration */
;;;441        usci->LINECTL = (usci->LINECTL & ~USCI_LINECTL_DWIDTH_Msk) | u32data_width;
;;;442        usci->PROTCTL = (usci->PROTCTL & ~(USCI_PROTCTL_STICKEN_Msk | USCI_PROTCTL_EVENPARITY_Msk |
;;;443                                           USCI_PROTCTL_PARITYEN_Msk)) | u32parity;
;;;444        usci->PROTCTL = (usci->PROTCTL & ~USCI_PROTCTL_STOPB_Msk ) | u32stop_bits;
;;;445    
;;;446        return (u32PCLKFreq/u32PDSCnt/u32MinDSCnt/u32MinClkDiv);
;;;447    }
0000a0  0580              LSLS     r0,r0,#22
0000a2  0f80              LSRS     r0,r0,#30
0000a4  1c40              ADDS     r0,r0,#1
0000a6  9003              STR      r0,[sp,#0xc]          ;436
0000a8  68b0              LDR      r0,[r6,#8]            ;436
0000aa  0440              LSLS     r0,r0,#17
0000ac  0ec0              LSRS     r0,r0,#27
0000ae  1c40              ADDS     r0,r0,#1
0000b0  9001              STR      r0,[sp,#4]            ;437
0000b2  68b0              LDR      r0,[r6,#8]            ;437
0000b4  0180              LSLS     r0,r0,#6
0000b6  0d80              LSRS     r0,r0,#22
0000b8  1c40              ADDS     r0,r0,#1
0000ba  9002              STR      r0,[sp,#8]            ;437
                  |L11.188|
0000bc  6af0              LDR      r0,[r6,#0x2c]         ;441
0000be  210f              MOVS     r1,#0xf               ;441
0000c0  0209              LSLS     r1,r1,#8              ;441
0000c2  4388              BICS     r0,r0,r1              ;441
0000c4  9909              LDR      r1,[sp,#0x24]         ;441
0000c6  4308              ORRS     r0,r0,r1              ;441
0000c8  62f0              STR      r0,[r6,#0x2c]         ;441
0000ca  6df0              LDR      r0,[r6,#0x5c]         ;442
0000cc  490c              LDR      r1,|L11.256|
0000ce  4008              ANDS     r0,r0,r1              ;442
0000d0  990a              LDR      r1,[sp,#0x28]         ;442
0000d2  4308              ORRS     r0,r0,r1              ;442
0000d4  65f0              STR      r0,[r6,#0x5c]         ;442
0000d6  6df0              LDR      r0,[r6,#0x5c]         ;444
0000d8  9910              LDR      r1,[sp,#0x40]         ;444
0000da  0840              LSRS     r0,r0,#1              ;444
0000dc  0040              LSLS     r0,r0,#1              ;444
0000de  4308              ORRS     r0,r0,r1              ;444
0000e0  65f0              STR      r0,[r6,#0x5c]         ;444
0000e2  9903              LDR      r1,[sp,#0xc]          ;446
0000e4  9804              LDR      r0,[sp,#0x10]         ;446
0000e6  f7fffffe          BL       __aeabi_uidivmod
0000ea  9901              LDR      r1,[sp,#4]            ;446
0000ec  f7fffffe          BL       __aeabi_uidivmod
0000f0  9902              LDR      r1,[sp,#8]            ;446
0000f2  f7fffffe          BL       __aeabi_uidivmod
0000f6  b00b              ADD      sp,sp,#0x2c
0000f8  bdf0              POP      {r4-r7,pc}
;;;448    
                          ENDP

0000fa  0000              DCW      0x0000
                  |L11.252|
                          DCD      0x02255100
                  |L11.256|
                          DCD      0xfbfffff9

                          AREA ||i.USCI_UART_Write||, CODE, READONLY, ALIGN=1

                  USCI_UART_Write PROC
;;;481     */
;;;482    uint32_t USCI_UART_Write(USCI_T* usci, uint8_t *pu8TxBuf, uint32_t u32WriteBytes)
000000  b570              PUSH     {r4-r6,lr}
;;;483    {
000002  4604              MOV      r4,r0
;;;484        uint32_t  u32Count, u32delayno;
;;;485    
;;;486        for(u32Count = 0; u32Count != u32WriteBytes; u32Count++) {
000004  2000              MOVS     r0,#0
;;;487            u32delayno = 0;
;;;488            while((usci->BUFSTS & USCI_BUFSTS_TXEMPTY_Msk) == 0) { /* Wait Tx empty */
;;;489                u32delayno++;
;;;490                if(u32delayno >= 0x40000000)
000006  2501              MOVS     r5,#1
000008  07ad              LSLS     r5,r5,#30
00000a  e00c              B        |L12.38|
                  |L12.12|
00000c  2300              MOVS     r3,#0                 ;487
00000e  e004              B        |L12.26|
                  |L12.16|
000010  1c5b              ADDS     r3,r3,#1              ;488
000012  42ab              CMP      r3,r5
000014  d301              BCC      |L12.26|
;;;491                    return FALSE;
000016  2000              MOVS     r0,#0
;;;492            }
;;;493            usci->TXDAT = pu8TxBuf[u32Count];    /* Send USCI_UART Data to buffer */
;;;494        }
;;;495    
;;;496        return u32Count;
;;;497    
;;;498    }
000018  bd70              POP      {r4-r6,pc}
                  |L12.26|
00001a  6be6              LDR      r6,[r4,#0x3c]         ;488
00001c  05f6              LSLS     r6,r6,#23             ;488
00001e  d5f7              BPL      |L12.16|
000020  5c0b              LDRB     r3,[r1,r0]            ;493
000022  6323              STR      r3,[r4,#0x30]         ;493
000024  1c40              ADDS     r0,r0,#1              ;493
                  |L12.38|
000026  4290              CMP      r0,r2                 ;486
000028  d1f0              BNE      |L12.12|
00002a  bd70              POP      {r4-r6,pc}
;;;499    
                          ENDP


;*** Start embedded assembler ***

#line 1 "..\\..\\..\\..\\Library\\StdDriver\\src\\usci_uart.c"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___11_usci_uart_c_17894c98____REV16|
#line 118 "..\\..\\..\\..\\Library\\CMSIS\\Include\\core_cmInstr.h"
|__asm___11_usci_uart_c_17894c98____REV16| PROC
#line 119

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___11_usci_uart_c_17894c98____REVSH|
#line 132
|__asm___11_usci_uart_c_17894c98____REVSH| PROC
#line 133

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
