; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\obj\usci_uart.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\usci_uart.d --cpu=Cortex-M0 --apcs=interwork --diag_suppress=9931 -I..\..\..\Library\CMSIS\Include -I..\..\..\Library\Device\Nuvoton\NM1240\Include -I..\..\..\Library\StdDriver\inc -I.\RTE\_Template -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.4.0\CMSIS\Core\Include -IC:\Keil_v5\ARM\PACK\Nuvoton\NuMicro_DFP\1.3.9\Device\NM1230\Include -D__MICROLIB -D__UVISION_VERSION=526 -D_RTE_ --omf_browse=.\obj\usci_uart.crf ..\..\..\Library\StdDriver\src\usci_uart.c]
                          THUMB

                          AREA ||i.UUART_ClearIntFlag||, CODE, READONLY, ALIGN=1

                  UUART_ClearIntFlag PROC
;;;47     
;;;48     void UUART_ClearIntFlag(UUART_T* uuart , uint32_t u32Mask)
000000  07ca              LSLS     r2,r1,#31
;;;49     {
000002  d002              BEQ      |L1.10|
;;;50         if(u32Mask & UUART_BRK_INT_MASK)  /* Clear LIN Break Detected Interrupt */
;;;51             uuart->PROTSTS = UUART_PROTSTS_BRKDETIF_Msk;
000004  22ff              MOVS     r2,#0xff
000006  3201              ADDS     r2,#1
000008  6642              STR      r2,[r0,#0x64]
                  |L1.10|
;;;52     	
;;;53         if(u32Mask & UUART_ABR_INT_MASK)  /* Clear Auto-baud Rate Interrupt */
00000a  078a              LSLS     r2,r1,#30
00000c  d502              BPL      |L1.20|
;;;54             uuart->PROTSTS = UUART_PROTSTS_ABRDETIF_Msk;
00000e  2201              MOVS     r2,#1
000010  0252              LSLS     r2,r2,#9
000012  6642              STR      r2,[r0,#0x64]
                  |L1.20|
;;;55     
;;;56         if(u32Mask & UUART_RLS_INT_MASK)   /* Clear Receive Line Status Interrupt */
000014  074a              LSLS     r2,r1,#29
000016  d501              BPL      |L1.28|
;;;57             uuart->PROTSTS = (UUART_PROTSTS_BREAK_Msk | UUART_PROTSTS_FRMERR_Msk | UUART_PROTSTS_PARITYERR_Msk);
000018  22e0              MOVS     r2,#0xe0
00001a  6642              STR      r2,[r0,#0x64]
                  |L1.28|
;;;58     
;;;59         if(u32Mask & UUART_BUF_RXOV_INT_MASK)   /* Clear Receive Buffer Over-run Error Interrupt */
00001c  070b              LSLS     r3,r1,#28
;;;60             uuart->BUFSTS = UUART_BUFSTS_RXOVIF_Msk;
00001e  2208              MOVS     r2,#8
000020  2b00              CMP      r3,#0                 ;59
000022  da00              BGE      |L1.38|
000024  63c2              STR      r2,[r0,#0x3c]
                  |L1.38|
;;;61     
;;;62         if(u32Mask & UUART_TXST_INT_MASK)   /* Clear Transmit Start Interrupt */
000026  06cb              LSLS     r3,r1,#27
000028  d501              BPL      |L1.46|
;;;63             uuart->PROTSTS = UUART_PROTSTS_TXSTIF_Msk;
00002a  2302              MOVS     r3,#2
00002c  6643              STR      r3,[r0,#0x64]
                  |L1.46|
;;;64     
;;;65         if(u32Mask & UUART_TXEND_INT_MASK)   /* Clear Transmit End Interrupt */
00002e  068b              LSLS     r3,r1,#26
000030  d501              BPL      |L1.54|
;;;66             uuart->PROTSTS = UUART_PROTSTS_TXENDIF_Msk;
000032  2304              MOVS     r3,#4
000034  6643              STR      r3,[r0,#0x64]
                  |L1.54|
;;;67     
;;;68         if(u32Mask & UUART_RXST_INT_MASK)   /* Clear Receive Start Interrupt */
000036  064b              LSLS     r3,r1,#25
000038  d500              BPL      |L1.60|
;;;69             uuart->PROTSTS = UUART_PROTSTS_RXSTIF_Msk;
00003a  6642              STR      r2,[r0,#0x64]
                  |L1.60|
;;;70     
;;;71         if(u32Mask & UUART_RXEND_INT_MASK)   /* Clear Receive End Interrupt */
00003c  0609              LSLS     r1,r1,#24
00003e  d501              BPL      |L1.68|
;;;72             uuart->PROTSTS = UUART_PROTSTS_RXENDIF_Msk;
000040  2110              MOVS     r1,#0x10
000042  6641              STR      r1,[r0,#0x64]
                  |L1.68|
;;;73     
;;;74     }
000044  4770              BX       lr
;;;75     
                          ENDP


                          AREA ||i.UUART_Close||, CODE, READONLY, ALIGN=1

                  UUART_Close PROC
;;;147     */
;;;148    void UUART_Close(UUART_T* uuart)
000000  2100              MOVS     r1,#0
;;;149    {
;;;150        uuart->CTL = 0;
000002  6001              STR      r1,[r0,#0]
;;;151    }
000004  4770              BX       lr
;;;152    
                          ENDP


                          AREA ||i.UUART_DisableInt||, CODE, READONLY, ALIGN=1

                  UUART_DisableInt PROC
;;;173     */
;;;174    void UUART_DisableInt(UUART_T* uuart, uint32_t u32Mask)
000000  b530              PUSH     {r4,r5,lr}
;;;175    {
;;;176        /* Disable LIN break detected interrupt flag */
;;;177        if((u32Mask & UUART_BRK_INT_MASK) == UUART_BRK_INT_MASK)
000002  07ca              LSLS     r2,r1,#31
000004  d003              BEQ      |L3.14|
;;;178            uuart->PROTIEN &= ~UUART_PROTIEN_BRKIEN_Msk;
000006  6e02              LDR      r2,[r0,#0x60]
000008  0852              LSRS     r2,r2,#1
00000a  0052              LSLS     r2,r2,#1
00000c  6602              STR      r2,[r0,#0x60]
                  |L3.14|
;;;179    	
;;;180        /* Disable Auto-baud rate interrupt flag */
;;;181        if((u32Mask & UUART_ABR_INT_MASK) == UUART_ABR_INT_MASK)
00000e  078a              LSLS     r2,r1,#30
;;;182            uuart->PROTIEN &= ~UUART_PROTIEN_ABRIEN_Msk;
000010  2402              MOVS     r4,#2
000012  2a00              CMP      r2,#0                 ;181
000014  da02              BGE      |L3.28|
000016  6e02              LDR      r2,[r0,#0x60]
000018  43a2              BICS     r2,r2,r4
00001a  6602              STR      r2,[r0,#0x60]
                  |L3.28|
;;;183    
;;;184        /* Disable receive line status interrupt flag */
;;;185        if((u32Mask & UUART_RLS_INT_MASK) == UUART_RLS_INT_MASK)
00001c  074b              LSLS     r3,r1,#29
;;;186            uuart->PROTIEN &= ~UUART_PROTIEN_RLSIEN_Msk;
00001e  2204              MOVS     r2,#4
000020  2b00              CMP      r3,#0                 ;185
000022  da02              BGE      |L3.42|
000024  6e03              LDR      r3,[r0,#0x60]
000026  4393              BICS     r3,r3,r2
000028  6603              STR      r3,[r0,#0x60]
                  |L3.42|
;;;187    
;;;188        /* Disable RX overrun interrupt flag */
;;;189        if((u32Mask & UUART_BUF_RXOV_INT_MASK) == UUART_BUF_RXOV_INT_MASK)
00002a  070b              LSLS     r3,r1,#28
00002c  d504              BPL      |L3.56|
;;;190            uuart->BUFCTL &= ~UUART_BUFCTL_RXOVIEN_Msk;
00002e  6b83              LDR      r3,[r0,#0x38]
000030  2501              MOVS     r5,#1
000032  03ad              LSLS     r5,r5,#14
000034  43ab              BICS     r3,r3,r5
000036  6383              STR      r3,[r0,#0x38]
                  |L3.56|
;;;191    
;;;192        /* Disable TX start interrupt flag */
;;;193        if((u32Mask & UUART_TXST_INT_MASK) == UUART_TXST_INT_MASK)
000038  06cb              LSLS     r3,r1,#27
00003a  d502              BPL      |L3.66|
;;;194            uuart->INTEN &= ~UUART_INTEN_TXSTIEN_Msk;
00003c  6843              LDR      r3,[r0,#4]
00003e  43a3              BICS     r3,r3,r4
000040  6043              STR      r3,[r0,#4]
                  |L3.66|
;;;195    
;;;196        /* Disable TX end interrupt flag */
;;;197        if((u32Mask & UUART_TXEND_INT_MASK) == UUART_TXEND_INT_MASK)
000042  068b              LSLS     r3,r1,#26
000044  d502              BPL      |L3.76|
;;;198            uuart->INTEN &= ~UUART_INTEN_TXENDIEN_Msk;
000046  6843              LDR      r3,[r0,#4]
000048  4393              BICS     r3,r3,r2
00004a  6043              STR      r3,[r0,#4]
                  |L3.76|
;;;199    
;;;200        /* Disable RX start interrupt flag */
;;;201        if((u32Mask & UUART_RXST_INT_MASK) == UUART_RXST_INT_MASK)
00004c  064a              LSLS     r2,r1,#25
00004e  d503              BPL      |L3.88|
;;;202            uuart->INTEN &= ~UUART_INTEN_RXSTIEN_Msk;
000050  6842              LDR      r2,[r0,#4]
000052  2308              MOVS     r3,#8
000054  439a              BICS     r2,r2,r3
000056  6042              STR      r2,[r0,#4]
                  |L3.88|
;;;203    
;;;204        /* Disable RX end interrupt flag */
;;;205        if((u32Mask & UUART_RXEND_INT_MASK) == UUART_RXEND_INT_MASK)
000058  0609              LSLS     r1,r1,#24
00005a  d503              BPL      |L3.100|
;;;206            uuart->INTEN &= ~UUART_INTEN_RXENDIEN_Msk;
00005c  6841              LDR      r1,[r0,#4]
00005e  2210              MOVS     r2,#0x10
000060  4391              BICS     r1,r1,r2
000062  6041              STR      r1,[r0,#4]
                  |L3.100|
;;;207    }
000064  bd30              POP      {r4,r5,pc}
;;;208    
                          ENDP


                          AREA ||i.UUART_DisableWakeup||, CODE, READONLY, ALIGN=1

                  UUART_DisableWakeup PROC
;;;564     */
;;;565    void UUART_DisableWakeup(UUART_T* uuart)
000000  6dc1              LDR      r1,[r0,#0x5c]
;;;566    {
;;;567        uuart->PROTCTL &= ~(UUART_PROTCTL_DATWKEN_Msk);    
000002  2201              MOVS     r2,#1
000004  0252              LSLS     r2,r2,#9
000006  4391              BICS     r1,r1,r2
000008  65c1              STR      r1,[r0,#0x5c]
;;;568        uuart->WKCTL &= ~UUART_WKCTL_WKEN_Msk;
00000a  6d41              LDR      r1,[r0,#0x54]
00000c  0849              LSRS     r1,r1,#1
00000e  0049              LSLS     r1,r1,#1
000010  6541              STR      r1,[r0,#0x54]
;;;569    }
000012  4770              BX       lr
;;;570    
                          ENDP


                          AREA ||i.UUART_EnableInt||, CODE, READONLY, ALIGN=1

                  UUART_EnableInt PROC
;;;229     */
;;;230    void UUART_EnableInt(UUART_T*  uuart, uint32_t u32Mask)
000000  b530              PUSH     {r4,r5,lr}
;;;231    {
;;;232        /* Enable LIN break detected interrupt flag */
;;;233        if((u32Mask & UUART_BRK_INT_MASK) == UUART_BRK_INT_MASK)
000002  07ca              LSLS     r2,r1,#31
000004  d003              BEQ      |L5.14|
;;;234            uuart->PROTIEN |= UUART_PROTIEN_BRKIEN_Msk;
000006  6e02              LDR      r2,[r0,#0x60]
000008  2301              MOVS     r3,#1
00000a  431a              ORRS     r2,r2,r3
00000c  6602              STR      r2,[r0,#0x60]
                  |L5.14|
;;;235    	
;;;236        /* Enable Auto-baud rate interrupt flag */
;;;237        if((u32Mask & UUART_ABR_INT_MASK) == UUART_ABR_INT_MASK)
00000e  078a              LSLS     r2,r1,#30
;;;238            uuart->PROTIEN |= UUART_PROTIEN_ABRIEN_Msk;
000010  2402              MOVS     r4,#2
000012  2a00              CMP      r2,#0                 ;237
000014  da02              BGE      |L5.28|
000016  6e02              LDR      r2,[r0,#0x60]
000018  4322              ORRS     r2,r2,r4
00001a  6602              STR      r2,[r0,#0x60]
                  |L5.28|
;;;239    
;;;240        /* Enable receive line status interrupt flag */
;;;241        if((u32Mask & UUART_RLS_INT_MASK) == UUART_RLS_INT_MASK)
00001c  074b              LSLS     r3,r1,#29
;;;242            uuart->PROTIEN |= UUART_PROTIEN_RLSIEN_Msk;
00001e  2204              MOVS     r2,#4
000020  2b00              CMP      r3,#0                 ;241
000022  da02              BGE      |L5.42|
000024  6e03              LDR      r3,[r0,#0x60]
000026  4313              ORRS     r3,r3,r2
000028  6603              STR      r3,[r0,#0x60]
                  |L5.42|
;;;243    
;;;244        /* Enable RX overrun interrupt flag */
;;;245        if((u32Mask & UUART_BUF_RXOV_INT_MASK) == UUART_BUF_RXOV_INT_MASK)
00002a  070b              LSLS     r3,r1,#28
00002c  d504              BPL      |L5.56|
;;;246            uuart->BUFCTL |= UUART_BUFCTL_RXOVIEN_Msk;
00002e  6b83              LDR      r3,[r0,#0x38]
000030  2501              MOVS     r5,#1
000032  03ad              LSLS     r5,r5,#14
000034  432b              ORRS     r3,r3,r5
000036  6383              STR      r3,[r0,#0x38]
                  |L5.56|
;;;247    
;;;248        /* Enable TX start interrupt flag */
;;;249        if((u32Mask & UUART_TXST_INT_MASK) == UUART_TXST_INT_MASK)
000038  06cb              LSLS     r3,r1,#27
00003a  d502              BPL      |L5.66|
;;;250            uuart->INTEN |= UUART_INTEN_TXSTIEN_Msk;
00003c  6843              LDR      r3,[r0,#4]
00003e  4323              ORRS     r3,r3,r4
000040  6043              STR      r3,[r0,#4]
                  |L5.66|
;;;251    
;;;252        /* Enable TX end interrupt flag */
;;;253        if((u32Mask & UUART_TXEND_INT_MASK) == UUART_TXEND_INT_MASK)
000042  068b              LSLS     r3,r1,#26
000044  d502              BPL      |L5.76|
;;;254            uuart->INTEN |= UUART_INTEN_TXENDIEN_Msk;
000046  6843              LDR      r3,[r0,#4]
000048  4313              ORRS     r3,r3,r2
00004a  6043              STR      r3,[r0,#4]
                  |L5.76|
;;;255    
;;;256        /* Enable RX start interrupt flag */
;;;257        if((u32Mask & UUART_RXST_INT_MASK) == UUART_RXST_INT_MASK)
00004c  064a              LSLS     r2,r1,#25
00004e  d503              BPL      |L5.88|
;;;258            uuart->INTEN |= UUART_INTEN_RXSTIEN_Msk;
000050  6842              LDR      r2,[r0,#4]
000052  2308              MOVS     r3,#8
000054  431a              ORRS     r2,r2,r3
000056  6042              STR      r2,[r0,#4]
                  |L5.88|
;;;259    
;;;260        /* Enable RX end interrupt flag */
;;;261        if((u32Mask & UUART_RXEND_INT_MASK) == UUART_RXEND_INT_MASK)
000058  0609              LSLS     r1,r1,#24
00005a  d503              BPL      |L5.100|
;;;262            uuart->INTEN |= UUART_INTEN_RXENDIEN_Msk;
00005c  6841              LDR      r1,[r0,#4]
00005e  2210              MOVS     r2,#0x10
000060  4311              ORRS     r1,r1,r2
000062  6041              STR      r1,[r0,#4]
                  |L5.100|
;;;263    }
000064  bd30              POP      {r4,r5,pc}
;;;264    
                          ENDP


                          AREA ||i.UUART_EnableWakeup||, CODE, READONLY, ALIGN=1

                  UUART_EnableWakeup PROC
;;;548     */
;;;549    void UUART_EnableWakeup(UUART_T* uuart, uint32_t u32WakeupMode)
000000  6dc1              LDR      r1,[r0,#0x5c]
;;;550    {
;;;551        uuart->PROTCTL |= UUART_PROTCTL_DATWKEN_Msk;
000002  2201              MOVS     r2,#1
000004  0252              LSLS     r2,r2,#9
000006  4311              ORRS     r1,r1,r2
000008  65c1              STR      r1,[r0,#0x5c]
;;;552        uuart->WKCTL |= UUART_WKCTL_WKEN_Msk;
00000a  6d41              LDR      r1,[r0,#0x54]
00000c  2201              MOVS     r2,#1
00000e  4311              ORRS     r1,r1,r2
000010  6541              STR      r1,[r0,#0x54]
;;;553    }
000012  4770              BX       lr
;;;554    
                          ENDP


                          AREA ||i.UUART_GetIntFlag||, CODE, READONLY, ALIGN=1

                  UUART_GetIntFlag PROC
;;;97     
;;;98     uint32_t UUART_GetIntFlag(UUART_T* uuart , uint32_t u32Mask)
000000  4602              MOV      r2,r0
;;;99     {
;;;100        uint32_t u32IntFlag = 0;
000002  2000              MOVS     r0,#0
;;;101    
;;;102        /* Check LIN Break Detected Interrupt Flag */
;;;103        if((u32Mask & UUART_BRK_INT_MASK) && (uuart->PROTSTS & UUART_PROTSTS_BRKDETIF_Msk))
000004  07cb              LSLS     r3,r1,#31
000006  d003              BEQ      |L7.16|
000008  6e53              LDR      r3,[r2,#0x64]
00000a  05db              LSLS     r3,r3,#23
00000c  d500              BPL      |L7.16|
;;;104            u32IntFlag |= UUART_BRK_INT_MASK;
00000e  2001              MOVS     r0,#1
                  |L7.16|
;;;105    	
;;;106        /* Check Auto-baud Rate Interrupt Flag */
;;;107        if((u32Mask & UUART_ABR_INT_MASK) && (uuart->PROTSTS & UUART_PROTSTS_ABRDETIF_Msk))
000010  078b              LSLS     r3,r1,#30
000012  d504              BPL      |L7.30|
000014  6e53              LDR      r3,[r2,#0x64]
000016  059b              LSLS     r3,r3,#22
000018  d501              BPL      |L7.30|
;;;108            u32IntFlag |= UUART_ABR_INT_MASK;
00001a  2302              MOVS     r3,#2
00001c  4318              ORRS     r0,r0,r3
                  |L7.30|
;;;109    
;;;110        /* Check Receive Line Status Interrupt Flag */
;;;111        if((u32Mask & UUART_RLS_INT_MASK) && (uuart->PROTSTS & (UUART_PROTSTS_BREAK_Msk | UUART_PROTSTS_FRMERR_Msk | UUART_PROTSTS_PARITYERR_Msk)))
00001e  074b              LSLS     r3,r1,#29
000020  d505              BPL      |L7.46|
000022  6e53              LDR      r3,[r2,#0x64]
000024  061b              LSLS     r3,r3,#24
000026  0f5b              LSRS     r3,r3,#29
000028  d001              BEQ      |L7.46|
;;;112            u32IntFlag |= UUART_RLS_INT_MASK;
00002a  2304              MOVS     r3,#4
00002c  4318              ORRS     r0,r0,r3
                  |L7.46|
;;;113    
;;;114        /* Check Receive Buffer Over-run Error Interrupt Flag */
;;;115        if((u32Mask & UUART_BUF_RXOV_INT_MASK) && (uuart->BUFSTS & UUART_BUFSTS_RXOVIF_Msk))
00002e  070b              LSLS     r3,r1,#28
000030  d504              BPL      |L7.60|
000032  6bd3              LDR      r3,[r2,#0x3c]
000034  071b              LSLS     r3,r3,#28
000036  d501              BPL      |L7.60|
;;;116            u32IntFlag |= UUART_BUF_RXOV_INT_MASK;
000038  2308              MOVS     r3,#8
00003a  4318              ORRS     r0,r0,r3
                  |L7.60|
;;;117    
;;;118        /* Check Transmit Start Interrupt Flag */
;;;119        if((u32Mask & UUART_TXST_INT_MASK) && (uuart->PROTSTS & UUART_PROTSTS_TXSTIF_Msk))
00003c  06cb              LSLS     r3,r1,#27
00003e  d504              BPL      |L7.74|
000040  6e53              LDR      r3,[r2,#0x64]
000042  079b              LSLS     r3,r3,#30
000044  d501              BPL      |L7.74|
;;;120            u32IntFlag |= UUART_TXST_INT_MASK;
000046  2310              MOVS     r3,#0x10
000048  4318              ORRS     r0,r0,r3
                  |L7.74|
;;;121    
;;;122        /* Check Transmit End Interrupt Flag */
;;;123        if((u32Mask & UUART_TXEND_INT_MASK) && (uuart->PROTSTS & UUART_PROTSTS_TXENDIF_Msk))
00004a  068b              LSLS     r3,r1,#26
00004c  d504              BPL      |L7.88|
00004e  6e53              LDR      r3,[r2,#0x64]
000050  075b              LSLS     r3,r3,#29
000052  d501              BPL      |L7.88|
;;;124            u32IntFlag |= UUART_TXEND_INT_MASK;
000054  2320              MOVS     r3,#0x20
000056  4318              ORRS     r0,r0,r3
                  |L7.88|
;;;125    
;;;126        /* Check Receive Start Interrupt Flag */
;;;127        if((u32Mask & UUART_RXST_INT_MASK) && (uuart->PROTSTS & UUART_PROTSTS_RXSTIF_Msk))
000058  064b              LSLS     r3,r1,#25
00005a  d504              BPL      |L7.102|
00005c  6e53              LDR      r3,[r2,#0x64]
00005e  071b              LSLS     r3,r3,#28
000060  d501              BPL      |L7.102|
;;;128            u32IntFlag |= UUART_RXST_INT_MASK;
000062  2340              MOVS     r3,#0x40
000064  4318              ORRS     r0,r0,r3
                  |L7.102|
;;;129    
;;;130        /* Check Receive End Interrupt Flag */
;;;131        if((u32Mask & UUART_RXEND_INT_MASK) && (uuart->PROTSTS & UUART_PROTSTS_RXENDIF_Msk))
000066  0609              LSLS     r1,r1,#24
000068  d504              BPL      |L7.116|
00006a  6e51              LDR      r1,[r2,#0x64]
00006c  06c9              LSLS     r1,r1,#27
00006e  d501              BPL      |L7.116|
;;;132            u32IntFlag |= UUART_RXEND_INT_MASK;
000070  2180              MOVS     r1,#0x80
000072  4308              ORRS     r0,r0,r1
                  |L7.116|
;;;133    
;;;134        return u32IntFlag;
;;;135    
;;;136    }
000074  4770              BX       lr
;;;137    
                          ENDP


                          AREA ||i.UUART_Open||, CODE, READONLY, ALIGN=2

                  UUART_Open PROC
;;;275     */
;;;276    uint32_t UUART_Open(UUART_T* uuart, uint32_t u32baudrate)
000000  b5f0              PUSH     {r4-r7,lr}
;;;277    {
000002  b085              SUB      sp,sp,#0x14
000004  460d              MOV      r5,r1
000006  4606              MOV      r6,r0
;;;278        uint32_t u32PCLKFreq, u32PDSCnt, u32DSCnt, u32ClkDiv;
;;;279        uint32_t u32Tmp, u32Tmp2, u32Min, u32MinClkDiv, u32MinDSCnt;
;;;280    
;;;281        uint32_t u32Div;
;;;282    
;;;283        /* Get PCLK frequency */
;;;284        u32PCLKFreq = CLK_GetPCLKFreq();
000008  f7fffffe          BL       CLK_GetPCLKFreq
;;;285    
;;;286        u32Div = u32PCLKFreq / u32baudrate;
00000c  4629              MOV      r1,r5
00000e  9003              STR      r0,[sp,#0xc]
000010  f7fffffe          BL       __aeabi_uidivmod
000014  4604              MOV      r4,r0
;;;287        u32Tmp = (u32PCLKFreq / u32Div) - u32baudrate;
000016  4601              MOV      r1,r0
000018  9803              LDR      r0,[sp,#0xc]
00001a  f7fffffe          BL       __aeabi_uidivmod
00001e  1b47              SUBS     r7,r0,r5
;;;288        u32Tmp2 = u32baudrate - (u32PCLKFreq / (u32Div+1));
000020  1c61              ADDS     r1,r4,#1
000022  9803              LDR      r0,[sp,#0xc]
000024  f7fffffe          BL       __aeabi_uidivmod
000028  1a28              SUBS     r0,r5,r0
;;;289    
;;;290        if(u32Tmp >= u32Tmp2) u32Div = u32Div + 1;
00002a  4287              CMP      r7,r0
00002c  d300              BCC      |L8.48|
00002e  1c64              ADDS     r4,r4,#1
                  |L8.48|
;;;291    
;;;292        u32Tmp = 0x400 * 0x10;
000030  2101              MOVS     r1,#1
000032  0389              LSLS     r1,r1,#14
;;;293        for(u32PDSCnt = 1; u32PDSCnt <= 0x04; u32PDSCnt++) {
000034  2501              MOVS     r5,#1
                  |L8.54|
;;;294            if(u32Div <= (u32Tmp * u32PDSCnt)) break;
000036  4608              MOV      r0,r1
000038  4368              MULS     r0,r5,r0
00003a  42a0              CMP      r0,r4
00003c  d203              BCS      |L8.70|
00003e  1c6d              ADDS     r5,r5,#1
000040  2d04              CMP      r5,#4                 ;293
000042  d9f8              BLS      |L8.54|
000044  e001              B        |L8.74|
                  |L8.70|
;;;295        }
;;;296    
;;;297        if(u32PDSCnt > 0x4) u32PDSCnt = 0x4;
000046  2d04              CMP      r5,#4
000048  d900              BLS      |L8.76|
                  |L8.74|
00004a  2504              MOVS     r5,#4
                  |L8.76|
;;;298    
;;;299        u32Div = u32Div / u32PDSCnt;
00004c  4629              MOV      r1,r5
00004e  4620              MOV      r0,r4
000050  f7fffffe          BL       __aeabi_uidivmod
;;;300    
;;;301        /* Find best solution */
;;;302        u32Min = (uint32_t) - 1;
;;;303        u32MinDSCnt = 0;
000054  9002              STR      r0,[sp,#8]
000056  2000              MOVS     r0,#0
000058  2700              MOVS     r7,#0                 ;302
00005a  43ff              MVNS     r7,r7                 ;302
;;;304        u32MinClkDiv = 0;
00005c  9000              STR      r0,[sp,#0]
;;;305    
;;;306        u32Tmp = 0;
;;;307    
;;;308        for(u32DSCnt = 6; u32DSCnt <= 0x10; u32DSCnt++) { /* DSCNT could be 0x5~0xF */
00005e  2406              MOVS     r4,#6
000060  9001              STR      r0,[sp,#4]
                  |L8.98|
;;;309    
;;;310            u32ClkDiv = u32Div / u32DSCnt;
000062  4621              MOV      r1,r4
000064  9802              LDR      r0,[sp,#8]
000066  f7fffffe          BL       __aeabi_uidivmod
;;;311    
;;;312            if(u32ClkDiv > 0x400) {
00006a  2101              MOVS     r1,#1
00006c  0289              LSLS     r1,r1,#10
00006e  4288              CMP      r0,r1
000070  d905              BLS      |L8.126|
;;;313                u32ClkDiv = 0x400;
000072  4608              MOV      r0,r1
;;;314                u32Tmp = u32Div - (u32ClkDiv * u32DSCnt);
000074  9902              LDR      r1,[sp,#8]
000076  02a2              LSLS     r2,r4,#10
000078  1a8a              SUBS     r2,r1,r2
;;;315                u32Tmp2 = u32Tmp + 1;
00007a  1c51              ADDS     r1,r2,#1
00007c  e007              B        |L8.142|
                  |L8.126|
00007e  4601              MOV      r1,r0
;;;316            } else {
;;;317                u32Tmp = u32Div - (u32ClkDiv * u32DSCnt);
000080  9a02              LDR      r2,[sp,#8]
000082  4361              MULS     r1,r4,r1
000084  1a52              SUBS     r2,r2,r1
;;;318                u32Tmp2 = ((u32ClkDiv+1) * u32DSCnt) - u32Div;
000086  1c41              ADDS     r1,r0,#1
000088  9b02              LDR      r3,[sp,#8]
00008a  4361              MULS     r1,r4,r1
00008c  1ac9              SUBS     r1,r1,r3
                  |L8.142|
;;;319            }
;;;320    
;;;321            if(u32Tmp >= u32Tmp2) {
00008e  428a              CMP      r2,r1
000090  d301              BCC      |L8.150|
000092  1c40              ADDS     r0,r0,#1
;;;322                u32ClkDiv = u32ClkDiv + 1;
000094  e000              B        |L8.152|
                  |L8.150|
;;;323            } else u32Tmp2 = u32Tmp;
000096  4611              MOV      r1,r2
                  |L8.152|
;;;324    
;;;325            if(u32Tmp2 < u32Min) {
000098  42b9              CMP      r1,r7
00009a  d203              BCS      |L8.164|
;;;326                u32Min = u32Tmp2;
00009c  000f              MOVS     r7,r1
;;;327                u32MinDSCnt = u32DSCnt;
;;;328                u32MinClkDiv = u32ClkDiv;
;;;329    
;;;330                /* Break when get good results */
;;;331                if(u32Min == 0) {
00009e  9400              STR      r4,[sp,#0]
0000a0  9001              STR      r0,[sp,#4]
0000a2  d002              BEQ      |L8.170|
                  |L8.164|
0000a4  1c64              ADDS     r4,r4,#1
0000a6  2c10              CMP      r4,#0x10              ;308
0000a8  d9db              BLS      |L8.98|
                  |L8.170|
;;;332                    break;
;;;333                }
;;;334            }
;;;335        }
;;;336    
;;;337        /* Enable USCI_UART protocol */
;;;338        uuart->CTL &= ~UUART_CTL_FUNMODE_Msk;
0000aa  6830              LDR      r0,[r6,#0]
0000ac  08c0              LSRS     r0,r0,#3
0000ae  00c0              LSLS     r0,r0,#3
0000b0  6030              STR      r0,[r6,#0]
;;;339        uuart->CTL = 2 << UUART_CTL_FUNMODE_Pos;
0000b2  2002              MOVS     r0,#2
0000b4  6030              STR      r0,[r6,#0]
;;;340    
;;;341        /* Set USCI_UART line configuration */
;;;342        uuart->LINECTL = UUART_WORD_LEN_8 | UUART_LINECTL_LSB_Msk;
0000b6  4811              LDR      r0,|L8.252|
0000b8  62f0              STR      r0,[r6,#0x2c]
;;;343        uuart->DATIN0 = (2 << UUART_DATIN0_EDGEDET_Pos);  /* Set falling edge detection */
0000ba  2010              MOVS     r0,#0x10
0000bc  6130              STR      r0,[r6,#0x10]
;;;344    
;;;345        /* Set USCI_UART baud rate */
;;;346        uuart->BRGEN = ((u32MinClkDiv-1) << UUART_BRGEN_CLKDIV_Pos) |
0000be  9900              LDR      r1,[sp,#0]
0000c0  9801              LDR      r0,[sp,#4]
0000c2  028a              LSLS     r2,r1,#10
0000c4  2101              MOVS     r1,#1
0000c6  1e40              SUBS     r0,r0,#1
0000c8  0289              LSLS     r1,r1,#10
0000ca  0400              LSLS     r0,r0,#16
0000cc  1a51              SUBS     r1,r2,r1
0000ce  4308              ORRS     r0,r0,r1
0000d0  0229              LSLS     r1,r5,#8
0000d2  39ff              SUBS     r1,r1,#0xff
0000d4  3901              SUBS     r1,#1
0000d6  4308              ORRS     r0,r0,r1
0000d8  60b0              STR      r0,[r6,#8]
;;;347                      ((u32MinDSCnt-1) << UUART_BRGEN_DSCNT_Pos) |
;;;348                      ((u32PDSCnt-1) << UUART_BRGEN_PDSCNT_Pos);
;;;349    
;;;350        uuart->PROTCTL |= UUART_PROTCTL_PROTEN_Msk;
0000da  6df0              LDR      r0,[r6,#0x5c]
0000dc  2101              MOVS     r1,#1
0000de  07c9              LSLS     r1,r1,#31
0000e0  4308              ORRS     r0,r0,r1
0000e2  65f0              STR      r0,[r6,#0x5c]
;;;351    
;;;352        return (u32PCLKFreq/u32PDSCnt/u32MinDSCnt/u32MinClkDiv);
0000e4  4629              MOV      r1,r5
0000e6  9803              LDR      r0,[sp,#0xc]
0000e8  f7fffffe          BL       __aeabi_uidivmod
0000ec  9900              LDR      r1,[sp,#0]
0000ee  f7fffffe          BL       __aeabi_uidivmod
0000f2  9901              LDR      r1,[sp,#4]
0000f4  f7fffffe          BL       __aeabi_uidivmod
;;;353    }
0000f8  b005              ADD      sp,sp,#0x14
0000fa  bdf0              POP      {r4-r7,pc}
;;;354    
                          ENDP

                  |L8.252|
                          DCD      0x00000801

                          AREA ||i.UUART_Read||, CODE, READONLY, ALIGN=1

                  UUART_Read PROC
;;;366     */
;;;367    uint32_t UUART_Read(UUART_T* uuart, uint8_t *pu8RxBuf, uint32_t u32ReadBytes)
000000  b570              PUSH     {r4-r6,lr}
;;;368    {
000002  4604              MOV      r4,r0
;;;369        uint32_t  u32Count, u32delayno;
;;;370    
;;;371        for(u32Count = 0; u32Count < u32ReadBytes; u32Count++) {
000004  2000              MOVS     r0,#0
;;;372            u32delayno = 0;
;;;373    
;;;374            while(uuart->BUFSTS & UUART_BUFSTS_RXEMPTY_Msk) { /* Check RX empty => failed */
;;;375                u32delayno++;
;;;376                if(u32delayno >= 0x40000000)
000006  2501              MOVS     r5,#1
000008  07ad              LSLS     r5,r5,#30
00000a  e00c              B        |L9.38|
                  |L9.12|
00000c  2300              MOVS     r3,#0                 ;372
00000e  e004              B        |L9.26|
                  |L9.16|
000010  1c5b              ADDS     r3,r3,#1              ;374
000012  42ab              CMP      r3,r5
000014  d301              BCC      |L9.26|
;;;377                    return FALSE;
000016  2000              MOVS     r0,#0
;;;378            }
;;;379            pu8RxBuf[u32Count] = uuart->RXDAT;    /* Get Data from USCI RX  */
;;;380        }
;;;381    
;;;382        return u32Count;
;;;383    
;;;384    }
000018  bd70              POP      {r4-r6,pc}
                  |L9.26|
00001a  6be6              LDR      r6,[r4,#0x3c]         ;374
00001c  07f6              LSLS     r6,r6,#31             ;374
00001e  d1f7              BNE      |L9.16|
000020  6b63              LDR      r3,[r4,#0x34]         ;379
000022  540b              STRB     r3,[r1,r0]            ;379
000024  1c40              ADDS     r0,r0,#1              ;379
                  |L9.38|
000026  4290              CMP      r0,r2                 ;371
000028  d3f0              BCC      |L9.12|
00002a  bd70              POP      {r4-r6,pc}
;;;385    
                          ENDP


                          AREA ||i.UUART_SelectLINMode||, CODE, READONLY, ALIGN=1

                  UUART_SelectLINMode PROC
;;;501     */
;;;502    void UUART_SelectLINMode(UUART_T* uuart, uint32_t u32Mode)
000000  6dc2              LDR      r2,[r0,#0x5c]
;;;503    {
;;;504        uuart->PROTCTL &= ~(UUART_PROTCTL_LINRXEN_Msk | UUART_PROTCTL_LINBRKEN_Msk);
000002  23ff              MOVS     r3,#0xff
000004  3381              ADDS     r3,r3,#0x81
000006  439a              BICS     r2,r2,r3
000008  65c2              STR      r2,[r0,#0x5c]
;;;505        uuart->PROTCTL |= u32Mode;
00000a  6dc2              LDR      r2,[r0,#0x5c]
00000c  430a              ORRS     r2,r2,r1
00000e  65c2              STR      r2,[r0,#0x5c]
;;;506    }
000010  4770              BX       lr
;;;507    
                          ENDP


                          AREA ||i.UUART_SetLine_Config||, CODE, READONLY, ALIGN=2

                  UUART_SetLine_Config PROC
;;;409     */
;;;410    uint32_t UUART_SetLine_Config(UUART_T* uuart, uint32_t u32baudrate, uint32_t u32data_width, uint32_t u32parity, uint32_t u32stop_bits)
000000  b5ff              PUSH     {r0-r7,lr}
;;;411    {
000002  b085              SUB      sp,sp,#0x14
000004  460d              MOV      r5,r1
000006  4606              MOV      r6,r0
;;;412        uint32_t u32PCLKFreq, u32PDSCnt, u32DSCnt, u32ClkDiv;
;;;413        uint32_t u32Tmp, u32Tmp2, u32Min, u32MinClkDiv, u32MinDSCnt;
;;;414    
;;;415        uint32_t u32Div;
;;;416    
;;;417        /* Get PCLK frequency */
;;;418        u32PCLKFreq = CLK_GetPCLKFreq();
000008  f7fffffe          BL       CLK_GetPCLKFreq
;;;419    
;;;420        if(u32baudrate != 0) {
00000c  9003              STR      r0,[sp,#0xc]
00000e  2d00              CMP      r5,#0
000010  d05c              BEQ      |L11.204|
;;;421            u32Div = u32PCLKFreq / u32baudrate;
000012  4629              MOV      r1,r5
000014  f7fffffe          BL       __aeabi_uidivmod
000018  4604              MOV      r4,r0
;;;422            u32Tmp = (u32PCLKFreq / u32Div) - u32baudrate;
00001a  4601              MOV      r1,r0
00001c  9803              LDR      r0,[sp,#0xc]
00001e  f7fffffe          BL       __aeabi_uidivmod
000022  1b47              SUBS     r7,r0,r5
;;;423            u32Tmp2 = u32baudrate - (u32PCLKFreq / (u32Div+1));
000024  1c61              ADDS     r1,r4,#1
000026  9803              LDR      r0,[sp,#0xc]
000028  f7fffffe          BL       __aeabi_uidivmod
00002c  1a28              SUBS     r0,r5,r0
;;;424    
;;;425            if(u32Tmp >= u32Tmp2) u32Div = u32Div + 1;
00002e  4287              CMP      r7,r0
000030  d300              BCC      |L11.52|
000032  1c64              ADDS     r4,r4,#1
                  |L11.52|
;;;426    
;;;427            u32Tmp = 0x400 * 0x10;
000034  2101              MOVS     r1,#1
000036  0389              LSLS     r1,r1,#14
;;;428            for(u32PDSCnt = 1; u32PDSCnt <= 0x04; u32PDSCnt++) {
000038  2501              MOVS     r5,#1
                  |L11.58|
;;;429                if(u32Div <= (u32Tmp * u32PDSCnt)) break;
00003a  4608              MOV      r0,r1
00003c  4368              MULS     r0,r5,r0
00003e  42a0              CMP      r0,r4
000040  d203              BCS      |L11.74|
000042  1c6d              ADDS     r5,r5,#1
000044  2d04              CMP      r5,#4                 ;428
000046  d9f8              BLS      |L11.58|
000048  e001              B        |L11.78|
                  |L11.74|
;;;430            }
;;;431    
;;;432            if(u32PDSCnt > 0x4) u32PDSCnt = 0x4;
00004a  2d04              CMP      r5,#4
00004c  d900              BLS      |L11.80|
                  |L11.78|
00004e  2504              MOVS     r5,#4
                  |L11.80|
;;;433    
;;;434            u32Div = u32Div / u32PDSCnt;
000050  4629              MOV      r1,r5
000052  4620              MOV      r0,r4
000054  f7fffffe          BL       __aeabi_uidivmod
;;;435    
;;;436            /* Find best solution */
;;;437            u32Min = (uint32_t) - 1;
;;;438            u32MinDSCnt = 0;
000058  9002              STR      r0,[sp,#8]
00005a  2000              MOVS     r0,#0
00005c  2700              MOVS     r7,#0                 ;437
00005e  43ff              MVNS     r7,r7                 ;437
;;;439            u32MinClkDiv = 0;
000060  9000              STR      r0,[sp,#0]
;;;440    
;;;441            for(u32DSCnt = 6; u32DSCnt <= 0x10; u32DSCnt++) { /* DSCNT could be 0x5~0xF */
000062  2406              MOVS     r4,#6
000064  9001              STR      r0,[sp,#4]
                  |L11.102|
;;;442    
;;;443                u32ClkDiv = u32Div / u32DSCnt;
000066  4621              MOV      r1,r4
000068  9802              LDR      r0,[sp,#8]
00006a  f7fffffe          BL       __aeabi_uidivmod
;;;444    
;;;445                if(u32ClkDiv > 0x400) {
00006e  2101              MOVS     r1,#1
000070  0289              LSLS     r1,r1,#10
000072  4288              CMP      r0,r1
000074  d905              BLS      |L11.130|
;;;446                    u32ClkDiv = 0x400;
000076  4608              MOV      r0,r1
;;;447                    u32Tmp = u32Div - (u32ClkDiv * u32DSCnt);
000078  9902              LDR      r1,[sp,#8]
00007a  02a2              LSLS     r2,r4,#10
00007c  1a8a              SUBS     r2,r1,r2
;;;448                    u32Tmp2 = u32Tmp + 1;
00007e  1c51              ADDS     r1,r2,#1
000080  e007              B        |L11.146|
                  |L11.130|
000082  4601              MOV      r1,r0
;;;449                } else {
;;;450                    u32Tmp = u32Div - (u32ClkDiv * u32DSCnt);
000084  9a02              LDR      r2,[sp,#8]
000086  4361              MULS     r1,r4,r1
000088  1a52              SUBS     r2,r2,r1
;;;451                    u32Tmp2 = ((u32ClkDiv+1) * u32DSCnt) - u32Div;
00008a  1c41              ADDS     r1,r0,#1
00008c  9b02              LDR      r3,[sp,#8]
00008e  4361              MULS     r1,r4,r1
000090  1ac9              SUBS     r1,r1,r3
                  |L11.146|
;;;452                }
;;;453    
;;;454                if(u32Tmp >= u32Tmp2) {
000092  428a              CMP      r2,r1
000094  d301              BCC      |L11.154|
000096  1c40              ADDS     r0,r0,#1
;;;455                    u32ClkDiv = u32ClkDiv + 1;
000098  e000              B        |L11.156|
                  |L11.154|
;;;456                } else u32Tmp2 = u32Tmp;
00009a  4611              MOV      r1,r2
                  |L11.156|
;;;457    
;;;458                if(u32Tmp2 < u32Min) {
00009c  42b9              CMP      r1,r7
00009e  d203              BCS      |L11.168|
;;;459                    u32Min = u32Tmp2;
0000a0  000f              MOVS     r7,r1
;;;460                    u32MinDSCnt = u32DSCnt;
;;;461                    u32MinClkDiv = u32ClkDiv;
;;;462    
;;;463                    /* Break when get good results */
;;;464                    if(u32Min == 0) {
0000a2  9400              STR      r4,[sp,#0]
0000a4  9001              STR      r0,[sp,#4]
0000a6  d003              BEQ      |L11.176|
                  |L11.168|
0000a8  1c64              ADDS     r4,r4,#1
0000aa  2c10              CMP      r4,#0x10              ;441
0000ac  d9db              BLS      |L11.102|
;;;465                        break;
;;;466                    }
;;;467                }
;;;468            }
;;;469    
;;;470            /* Set USCI_UART baud rate */
;;;471            uuart->BRGEN = ((u32MinClkDiv-1) << UUART_BRGEN_CLKDIV_Pos) |
0000ae  9801              LDR      r0,[sp,#4]
                  |L11.176|
0000b0  9900              LDR      r1,[sp,#0]
0000b2  1e40              SUBS     r0,r0,#1
0000b4  028a              LSLS     r2,r1,#10
0000b6  2101              MOVS     r1,#1
0000b8  0289              LSLS     r1,r1,#10
0000ba  0400              LSLS     r0,r0,#16
0000bc  1a51              SUBS     r1,r2,r1
0000be  4308              ORRS     r0,r0,r1
0000c0  0229              LSLS     r1,r5,#8
0000c2  39ff              SUBS     r1,r1,#0xff
0000c4  3901              SUBS     r1,#1
0000c6  4308              ORRS     r0,r0,r1
0000c8  60b0              STR      r0,[r6,#8]
0000ca  e00d              B        |L11.232|
                  |L11.204|
;;;472                          ((u32MinDSCnt-1) << UUART_BRGEN_DSCNT_Pos) |
;;;473                          ((u32PDSCnt-1) << UUART_BRGEN_PDSCNT_Pos);
;;;474        } else {
;;;475            u32PDSCnt = ((uuart->BRGEN & UUART_BRGEN_PDSCNT_Msk) >> UUART_BRGEN_PDSCNT_Pos) + 1;
0000cc  68b0              LDR      r0,[r6,#8]
;;;476            u32MinDSCnt = ((uuart->BRGEN & UUART_BRGEN_DSCNT_Msk) >> UUART_BRGEN_DSCNT_Pos) + 1;
;;;477            u32MinClkDiv = ((uuart->BRGEN & UUART_BRGEN_CLKDIV_Msk) >> UUART_BRGEN_CLKDIV_Pos) + 1;
;;;478        }
;;;479    
;;;480        /* Set USCI_UART line configuration */
;;;481        uuart->LINECTL = (uuart->LINECTL & ~UUART_LINECTL_DWIDTH_Msk) | u32data_width;
;;;482        uuart->PROTCTL = (uuart->PROTCTL & ~(UUART_PROTCTL_STICKEN_Msk | UUART_PROTCTL_EVENPARITY_Msk |
;;;483                                           UUART_PROTCTL_PARITYEN_Msk)) | u32parity;
;;;484        uuart->PROTCTL = (uuart->PROTCTL & ~UUART_PROTCTL_STOPB_Msk ) | u32stop_bits;
;;;485    
;;;486        return (u32PCLKFreq/u32PDSCnt/u32MinDSCnt/u32MinClkDiv);
;;;487    }
0000ce  0580              LSLS     r0,r0,#22
0000d0  0f85              LSRS     r5,r0,#30
0000d2  68b0              LDR      r0,[r6,#8]            ;476
0000d4  0440              LSLS     r0,r0,#17
0000d6  0ec0              LSRS     r0,r0,#27
0000d8  1c40              ADDS     r0,r0,#1
0000da  9000              STR      r0,[sp,#0]            ;477
0000dc  68b0              LDR      r0,[r6,#8]            ;477
0000de  0180              LSLS     r0,r0,#6
0000e0  0d80              LSRS     r0,r0,#22
0000e2  1c40              ADDS     r0,r0,#1
0000e4  1c6d              ADDS     r5,r5,#1              ;477
0000e6  9001              STR      r0,[sp,#4]            ;477
                  |L11.232|
0000e8  6af0              LDR      r0,[r6,#0x2c]         ;481
0000ea  210f              MOVS     r1,#0xf               ;481
0000ec  0209              LSLS     r1,r1,#8              ;481
0000ee  4388              BICS     r0,r0,r1              ;481
0000f0  9907              LDR      r1,[sp,#0x1c]         ;481
0000f2  4308              ORRS     r0,r0,r1              ;481
0000f4  62f0              STR      r0,[r6,#0x2c]         ;481
0000f6  6df0              LDR      r0,[r6,#0x5c]         ;482
0000f8  490b              LDR      r1,|L11.296|
0000fa  4008              ANDS     r0,r0,r1              ;482
0000fc  9908              LDR      r1,[sp,#0x20]         ;482
0000fe  4308              ORRS     r0,r0,r1              ;482
000100  65f0              STR      r0,[r6,#0x5c]         ;482
000102  6df0              LDR      r0,[r6,#0x5c]         ;484
000104  990e              LDR      r1,[sp,#0x38]         ;484
000106  0840              LSRS     r0,r0,#1              ;484
000108  0040              LSLS     r0,r0,#1              ;484
00010a  4308              ORRS     r0,r0,r1              ;484
00010c  65f0              STR      r0,[r6,#0x5c]         ;484
00010e  4629              MOV      r1,r5                 ;486
000110  9803              LDR      r0,[sp,#0xc]          ;486
000112  f7fffffe          BL       __aeabi_uidivmod
000116  9900              LDR      r1,[sp,#0]            ;486
000118  f7fffffe          BL       __aeabi_uidivmod
00011c  9901              LDR      r1,[sp,#4]            ;486
00011e  f7fffffe          BL       __aeabi_uidivmod
000122  b009              ADD      sp,sp,#0x24
000124  bdf0              POP      {r4-r7,pc}
;;;488    
                          ENDP

000126  0000              DCW      0x0000
                  |L11.296|
                          DCD      0xfbfffff9

                          AREA ||i.UUART_Write||, CODE, READONLY, ALIGN=1

                  UUART_Write PROC
;;;519     */
;;;520    uint32_t UUART_Write(UUART_T* uuart, uint8_t *pu8TxBuf, uint32_t u32WriteBytes)
000000  b570              PUSH     {r4-r6,lr}
;;;521    {
000002  4604              MOV      r4,r0
;;;522        uint32_t  u32Count, u32delayno;
;;;523    
;;;524        for(u32Count = 0; u32Count != u32WriteBytes; u32Count++) {
000004  2000              MOVS     r0,#0
;;;525            u32delayno = 0;
;;;526            while((uuart->BUFSTS & UUART_BUFSTS_TXEMPTY_Msk) == 0) { /* Wait Tx empty */
;;;527                u32delayno++;
;;;528                if(u32delayno >= 0x40000000)
000006  2501              MOVS     r5,#1
000008  07ad              LSLS     r5,r5,#30
00000a  e00c              B        |L12.38|
                  |L12.12|
00000c  2300              MOVS     r3,#0                 ;525
00000e  e004              B        |L12.26|
                  |L12.16|
000010  1c5b              ADDS     r3,r3,#1              ;526
000012  42ab              CMP      r3,r5
000014  d301              BCC      |L12.26|
;;;529                    return FALSE;
000016  2000              MOVS     r0,#0
;;;530            }
;;;531            uuart->TXDAT = pu8TxBuf[u32Count];    /* Send USCI_UART Data to buffer */
;;;532        }
;;;533    
;;;534        return u32Count;
;;;535    
;;;536    }
000018  bd70              POP      {r4-r6,pc}
                  |L12.26|
00001a  6be6              LDR      r6,[r4,#0x3c]         ;526
00001c  05f6              LSLS     r6,r6,#23             ;526
00001e  d5f7              BPL      |L12.16|
000020  5c0b              LDRB     r3,[r1,r0]            ;531
000022  6323              STR      r3,[r4,#0x30]         ;531
000024  1c40              ADDS     r0,r0,#1              ;531
                  |L12.38|
000026  4290              CMP      r0,r2                 ;524
000028  d1f0              BNE      |L12.12|
00002a  bd70              POP      {r4-r6,pc}
;;;537    
                          ENDP


;*** Start embedded assembler ***

#line 1 "..\\..\\..\\Library\\StdDriver\\src\\usci_uart.c"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___11_usci_uart_c_2f0f282b____REV16|
#line 388 "..\\..\\..\\Library\\CMSIS\\Include\\cmsis_armcc.h"
|__asm___11_usci_uart_c_2f0f282b____REV16| PROC
#line 389

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___11_usci_uart_c_2f0f282b____REVSH|
#line 402
|__asm___11_usci_uart_c_2f0f282b____REVSH| PROC
#line 403

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
