/* Enable Internal RC 22.1184 MHz clock */
CLK_EnableXtalRC(CLK_PWRCON_OSC22M_EN_Msk);
/* Waiting for Internal RC clock ready */
CLK_WaitClockReady(CLK_CLKSTATUS_OSC22M_STB_Msk);
/* Enable External XTAL (4~24 MHz) */
CLK_EnableXtalRC(CLK_PWRCON_IRC10K_EN_Msk);
/* Waiting for 10k Hz clock ready */
CLK_WaitClockReady(CLK_CLKSTATUS_IRC10K_STB_Msk);
CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HIRC, 0); |