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[M467] Achieve 10.5 Msps ADC Sampling Rate

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admin 发表于 2025-9-24 17:07:11 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式
Application
This example code uses M467's EADC0/EADC1/EADC2 to alternately sample to achieve a 10.5 Msps sampling rate.
BSP Version
M460_Series_BSP_CMSIS_V3.00.004
Hardware
NuMaker- M467HJ V1.1

This example code will demonstrate how to use the EADC in the M467 series microcontroller to achieve a 10.5 Msps sampling rate. The M467 has three EADCs with sampling rate up to 4.5 Msps. ADC0/ADC1/ADC2 sample alternately, and the sampling rate can be tripled.

To achieve high-speed sampling without data loss, multiple peripherals need to work together. In this example, EPWM triggers EADC sampling, and EADC triggers PDMA to transmit the sampled data. Because both trigger delay and PDMA transfer require time, the final sampling rate can reach 10.5 Msps.

You can download the sample code at EC_M467_ADC_10_Msps_Sample_Rate_V1.00


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